Patents by Inventor Yeong-Cheol Lee

Yeong-Cheol Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070026712
    Abstract: Example embodiments of the present invention relate to a semiconductor device and a method of fabricating the same. Other example embodiments of the present invention relate to a semiconductor device having a metal silicide layer of a substrate and a barrier metal layer constituting a line layer and a method of fabricating the same. The semiconductor device may include a bar-type contact structure (e.g., a contact surface with an active region is bar shaped) and a dot-type contact structure (e.g., the contact surface is dot shaped). The bar-type contact structure may have a larger contact area with the active region. The bar-type contact structure may retard or prevent an ohmic contact layer, which is formed by the chemical combination of a barrier metal layer and a substrate between which a semiconductor layer is interposed, from being extended outside source/drain regions or being electrically shorted to a gate electrode.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 1, 2007
    Inventors: Joo-byoung Yoon, Jin-sung Kim, Chang-hyuk Ok, Kyung-woo Lee, Yeong-cheol Lee, Sang-jun Park
  • Publication number: 20060273369
    Abstract: A capacitor for a semiconductor device includes a lower electrode, a dielectric layer formed on a lower electrode, and an upper electrode formed on the dielectric layer. The lower electrode includes a first layer having a cylindrical shape and a mesh second layer formed on inner sidewalls and the bottom surface of the first layer. Beneficially, the first layer is connected to a conductive region of a semiconductor substrate by a contact plug. The lower electrode can be formed by injecting a catalyst into an opening in which the cylindrical first layer is to be formed before forming the cylindrical first layer.
    Type: Application
    Filed: August 15, 2006
    Publication date: December 7, 2006
    Inventor: Yeong-Cheol Lee
  • Patent number: 7109081
    Abstract: A capacitor for a semiconductor device includes a lower electrode, a dielectric layer formed on a lower electrode, and an upper electrode formed on the dielectric layer. The lower electrode includes a first layer having a cylindrical shape and a mesh second layer formed on inner sidewalls and the bottom surface of the first layer. Beneficially, the first layer is connected to a conductive region of a semiconductor substrate by a contact plug. The lower electrode can be formed by injecting a catalyst into an opening in which the cylindrical first layer is to be formed before forming the cylindrical first layer.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: September 19, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yeong-Cheol Lee
  • Publication number: 20060073691
    Abstract: In a method of manufacturing a semiconductor device including a capacitor, a first mold layer is formed on a semiconductor substrate. The first mold layer is partially etched to form a first mold layer pattern including an opening for a capacitor. A first lower electrode layer is formed on the first mold layer pattern. A second lower electrode layer including a plurality of first pores is formed on the first lower electrode layer and in the opening. Upper portions of the first lower electrode layer and the second lower electrode layer are removed to form a first lower electrode and a second lower electrode in the opening. A dielectric layer and an upper electrode are successively formed on the first lower electrode and the second lower electrode. Therefore, a capacitor having an enhanced capacitance may be obtained.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 6, 2006
    Inventors: Joo-Byoung Yoon, Jin-Sung Kim, Kyung-Woo Lee, Yeong-Cheol Lee, Sang-Jun Park, Hwan-Shik Park
  • Publication number: 20050116278
    Abstract: A capacitor for a semiconductor device includes a lower electrode, a dielectric layer formed on a lower electrode, and an upper electrode formed on the dielectric layer. The lower electrode includes a first layer having a cylindrical shape and a mesh second layer formed on inner sidewalls and the bottom surface of the first layer. Beneficially, the first layer is connected to a conductive region of a semiconductor substrate by a contact plug. The lower electrode can be formed by injecting a catalyst into an opening in which the cylindrical first layer is to be formed before forming the cylindrical first layer.
    Type: Application
    Filed: November 29, 2004
    Publication date: June 2, 2005
    Inventor: Yeong-Cheol Lee