Abstract: An integrated system for processing a substrate to improve electromigration performance of a copper interconnect, including: a lab-ambient transfer chamber capable of transferring the substrate from a substrate cassette coupled to the lab-ambient transfer chamber into the integrated system; a vacuum transfer chamber operated under vacuum at a pressure less than 1 Torr; a vacuum process module for depositing a metallic barrier layer, wherein the vacuum process module for depositing the metallic barrier layer is coupled to the vacuum transfer chamber, and is operated under vacuum at a pressure less than 1 Torr; a controlled-ambient transfer chamber filled with an inert gas selected from a group of inert gases; and, a deposition process module used to deposit a functionalization layer on the surface of the metallic barrier layer, wherein the deposition process module used to deposit the functionalization layer is coupled to the controlled-ambient transfer chamber.

Abstract: A method is provided, including the following method operations: depositing a metallic barrier layer to line a copper interconnect structure by a dry process in an integrated system configured to operate a mixture of dry and wet processes; depositing the functionalization layer over the metallic barrier layer by a wet process in the integrated system; and, depositing the copper layer over the functionalization layer in the copper interconnect structure by a wet process in the integrated system after the functionalization layer is deposited over the metallic barrier layer, wherein the material used for the functionalization layer comprises a complexing group with at least two ends, one end of the complexing group forming a bond with the metallic barrier layer and another end of the complexing group forming a bond with the copper layer.

Abstract: A method for forming copper on a substrate including inputting a copper source solution into a mixer, inputting a reducing solution into the mixer, mixing copper source solution and the reducing solution to form a plating solution having a pH of greater than about 6.5 and applying the plating solution to a substrate, the substrate including a catalytic layer wherein applying the plating solution to the substrate includes forming a catalytic layer, maintaining the catalytic layer in a controlled environment and forming copper on the catalytic layer. A system for forming copper structures is also disclosed.

Abstract: The embodiments fill the need of improving electromigration and reducing stress-induced voids of copper interconnect by enabling deposition of a thin and conformal barrier layer, and a copper layer in the copper interconnect. The adhesion between the barrier layer and the copper layer can be improved by making the barrier layer metal-rich prior copper deposition and by limiting the amount of oxygen the barrier layer is exposed prior to copper deposition. Alternatively, a functionalization layer can be deposited over the barrier layer to enable the copper layer being deposit in the copper interconnect with good adhesion between the barrier layer and the copper layer. An exemplary method of preparing a substrate surface of a substrate to deposit a functionalization layer over a metallic barrier layer of a copper interconnect to assist deposition of a copper layer in the copper interconnect in an integrated system in order to improve electromigration performance of the copper interconnect is provided.

Abstract: A method for generating plasma for removing metal oxide from a substrate is provided. The method includes providing a powered electrode assembly, which includes a powered electrode, a dielectric layer, and a wire mesh disposed between the powered electrode and the dielectric layer. The method also includes providing a grounded electrode assembly disposed opposite the powered electrode assembly to form a cavity wherein the plasma is generated. The wire mesh is shielded from the plasma by the dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the metal oxide. The method further includes introducing at least one inert gas and at least one process gas into the cavity. The method yet also includes applying an rf field to the cavity using the powered electrode to generate the plasma from the inert and the process gas.

Abstract: An integrated system for transferring and processing a substrate in a controlled environment to enable selective deposition of a thin layer of a cobalt-alloy material on a copper surface of a copper interconnect to improve electromigration performance of the copper interconnect, comprising: a lab-ambient transfer chamber; a substrate cleaning reactor coupled to the lab-ambient transfer chamber, wherein the substrate cleaning reactor cleans the substrate surface to remove metal-organic complex contaminants on the substrate surface; a vacuum transfer chamber; a vacuum process module for removing organic contaminants from the substrate surface; a controlled-ambient transfer chamber filled with an inert gas; and an electroless cobalt-alloy material deposition process module used to deposit the thin layer of cobalt-alloy material on the copper surface of the copper interconnect after the substrate surface has been removed of metallic contaminants and organic contaminants, and the copper surface has been removed of

Abstract: A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.

Abstract: The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically copper-to-cobalt-alloy interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a thin layer of a cobalt-alloy material on a copper surface of a copper interconnect of the substrate in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes removing contaminants and metal oxides from the substrate surface in the integrated system, and reconditioning the substrate surface using a reducing environment after removing contaminants and metal oxides in the integrated system.

Abstract: The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve silicon-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce a silicon-to-metal interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a layer of a metal on a silicon or polysilicon surface of the substrate to form a metal silicide in an integrated system is provided.

Abstract: Methods and systems are provided for preparing a ruthenium containing liner/barrier for metal deposition, and are useful in the manufacture of integrated circuits. In accordance with one embodiment, a borohydride solution having a pH greater than 12 is mixed with DI water at the place of application to form a pretreatment solution. The pretreatment solution is applied to reduce a ruthenium-containing surface of a substrate. Following reduction of the ruthenium containing surface, copper deposition may be initiated.

Abstract: Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.

Abstract: An electroless plating system is provided. The system includes a first vacuum chuck supporting a first wafer and a second vacuum chuck supporting a second wafer such that a top surface of the second wafer is opposing a top surface of the first wafer. The system also includes a fluid delivery system configured to deliver a plating solution to the top surface of the first wafer, wherein in response to delivery of the plating solution, the top surface of the second wafer is brought proximate to the top surface of the first wafer so that the plating solution contacts both top surfaces. A method for applying an electroless plating solution to a substrate is also provided.

Abstract: A method of depositing a thin film by atomic layer deposition (ALD) on a substrate surface is disclosed. The disclosed method includes placing an ALD deposition proximity head above the substrate with at least one gas channel configured to dispense a gas to an active process region of the substrate surface. The ALD deposition proximity head extends over and is being spaced apart from the active process region of the substrate surface when present. After a pulse of a first reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head, a pulse of a second reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head to react with the first reactant gas to form a portion of the thin layer of ALD film on the surface of substrate underneath the proximity head.

Abstract: A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.

Abstract: Presented are device structures and methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Abstract: Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

Abstract: A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.

Abstract: An electroplating head is disposed above and proximate to an upper surface of a wafer. Cations are transferred from an anode to an electroplating solution within the electroplating head. The electroplating solution flows downward through a porous electrically resistive material at an exit of the electroplating head to be disposed on the upper surface of the wafer. An electric current is established between the anode and the upper surface of the wafer through the electroplating solution. The electric current is uniformly distributed by the porous electrically resistive material present between the anode and the upper surface of the wafer. The electric current causes the cations to be attracted to the upper surface of the wafer.

Abstract: A method for producing a normalized surface on a substrate for a chemical mechanical planarization process is provided. The method initiates with grinding a surface of the substrate with a first surface associated with a first planarization length. The method includes planarizing the surface of the substrate with a second surface associated with a second planarization length. Here, the second planarization length being less than the first planarization length. A system for processing a semiconductor substrate is also provided.

Abstract: A method of depositing a thin film by atomic layer deposition (ALD) on a substrate surface is disclosed. The disclosed method includes placing an ALD deposition proximity head above the substrate with at least one gas channel configured to dispense a gas to an active process region of the substrate surface. The ALD deposition proximity head extends over and is being spaced apart from the active process region of the substrate surface when present. After a pulse of a first reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head, a pulse of a second reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head to react with the first reactant gas to form a portion of the thin layer of ALD film on the surface of substrate underneath the proximity head.