Patents by Inventor Yezdi N. Dordi

Yezdi N. Dordi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010052465
    Abstract: An apparatus comprising an electrolyte cell, an anode, and a porous rigid diffuser. The electrolyte cell is configured to receive a substrate to have a metal film deposited thereon. An anode is contained within the electrolyte cell. A porous rigid diffuser is connected to the electrolyte cell and extends across the electrolyte cell. The diffuser is positioned between a location that the substrate is to be positioned when the metal film is deposited thereon and the anode.
    Type: Application
    Filed: December 5, 2000
    Publication date: December 20, 2001
    Applicant: Applied Materials, Inc.
    Inventors: Yezdi N. Dordi, Joseph J. Stevens, H. Peter W. Hey, Donald J. K. Olgado
  • Publication number: 20010000396
    Abstract: An apparatus and associated method for deposition of metal ions contained in an electrolyte solution to form a metal film primarily on a seed layer formed on at least a first side of a substrate. The substrate has a second side that is opposed the first side and an edge joining the first side and the second side. The apparatus comprises a substrate holder system and an electric contact element. The electric contact element physically contacts one of the second side or the edge of the substrate. In one aspect, the substrate is rotated about its vertical axis when the seed layer of substrate is immersed in the electrolyte solution during the metal film deposition. In another aspect, the substrate is not rotated about its vertical axis when the seed layer on the substrate is immersed in the electrolyte solution during the metal film deposition.
    Type: Application
    Filed: December 5, 2000
    Publication date: April 26, 2001
    Applicant: Applied Materials Inc.
    Inventors: Yezdi N. Dordi, Joseph J. Stevens
  • Patent number: 5859474
    Abstract: A first array of elongate pads is formed on a first surface, such as that of an integrated circuit substrate, and a second array of elongate pads is formed on a second surface, such as that of a printed circuit board. An array of solder balls are reflow attached to the pads of the first array and then to the pads of the second array, to thereby electrically connect the substrate to the printed circuit board. The reflow solder balls thereby conform to the elongate shapes of the pads to be configured like truncated ellipsoids. Due to the surface tension forces between the pads and the balls therebetween, the "ellipsoids" advantageously have a high standoff. Also, the pads on each of the sides of the perimeter of the array are aligned longitudinally perpendicular to the respective sides. Thereby, wide channels between adjacent elongate pads are defined, through which one or more additional traces can advantageously be routed on the surface between the pads.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: January 12, 1999
    Assignee: LSI Logic Corporation
    Inventor: Yezdi N. Dordi
  • Patent number: 5835355
    Abstract: A tape ball grid array (TBGA) package, and a method of making a TBGA package, includes the use of a metal or other stiffener affixed to a flexible tape on which conductive traces connect contact points on an integrated circuit (IC) chip with an array of solder balls. The stiffener is perforated with a pattern of small vent holes. The TBGA package materials are hygroscopic. When the TBGA package is heated during 2nd level packaging, e.g., during solder reflow, moisture absorbed within the hygroscopic materials evaporates and the resulting water vapor is able to escape through the vent holes, rather than becoming trapped within the IC package and introducing various 2nd level packing failure modes.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: November 10, 1998
    Assignee: LSI Logic Corporation
    Inventor: Yezdi N. Dordi
  • Patent number: 5604376
    Abstract: Disclosed is a semiconductor package and method in which a semiconductor chip is mounted within the opening of a lead frame by bonding wires extending between the active front side of the chip and bonding pads of the lead frame, and the lead frame/chip assembly is encased. within a plastic molded body, with the inactive back side of the chip exposed and facing outside the package.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: February 18, 1997
    Assignee: Digital Equipment Corporation
    Inventors: William R. Hamburgen, John S. Fitch, Yezdi N. Dordi