Patents by Inventor Yi-Chang Wu

Yi-Chang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7360074
    Abstract: A method and apparatus thereof for flashing a BIOS of a data processing system remotely are provided. A BIOS flash instruction is given remotely from a remote console, transmitted to a microprocessor and a corresponding storage media of the data processing system via network, where the microprocessor is irresponsible for operating system. A BIOS image file is identified correct before performing BIOS of a system microprocessor that is responsible for operating system, where the system microprocessor is usually CPU. BIOS is remotely flashed with this method and apparatus, and since flash operation is performed independently of the operating system of the data processing system, BIOS re-flash can be performed and data processing system can be rebooted even when flash operation is failed or operating system is disable.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: April 15, 2008
    Assignee: Wistron Corporation
    Inventors: Sen-Ta Chan, Yi-Hsun Chen, Chao-Sheng Hsu, Yi-Chang Wu, Wen-Pin Huang
  • Publication number: 20070222628
    Abstract: A remote monitoring method includes monitoring a plurality of components on a main board. When one of the plurality of components fails to function properly, a warning message is produced to indicate that the component is out of order. Afterward, the warning message is transmitted to a remote control device through a network medium. The remote control device then produces a plot to imitate the relative positions of the main board and the components and displays the malfunctioning component on the plot.
    Type: Application
    Filed: May 15, 2006
    Publication date: September 27, 2007
    Inventors: Sen-Ta Chan, Yi-Chang Wu, Yi-Hsun Chen, Kun-Chang Chen
  • Publication number: 20070157014
    Abstract: A method and apparatus thereof for flashing a BIOS of a data processing system remotely are provided. A BIOS flash instruction is given remotely from a remote console, transmitted to a microprocessor and a corresponding storage media of the data processing system via network, where the microprocessor is irresponsible for operating system. A BIOS image file is identified correct before performing BIOS of a system microprocessor that is responsible for operating system, where the system microprocessor is usually CPU. BIOS is remotely flashed with this method and apparatus, and since flash operation is performed independently of the operating system of the data processing system, BIOS re-flash can be performed and data processing system can be rebooted even when flash operation is failed or operating system is disable.
    Type: Application
    Filed: March 16, 2007
    Publication date: July 5, 2007
    Applicant: WISTRON CORPORATION
    Inventors: Sen-Ta Chan, Yi-Hsun Chen, Chao-Sheng Hsu, Yi-Chang Wu, Wen-Pin Huang
  • Publication number: 20070118779
    Abstract: An intelligent test system includes a control device for generating control data, and a test device for testing an electronic product. The testing device includes a processor for transmitting a test signal to the electronic product according to the control data generated by the control device, and for controlling the intelligent test system according to the control data generated by the control device and feedback data generated by the electronic product in response to the test signal; and a memory for storing the feedback data generated by the electronic product. In doing so, the intelligent test system allows the electronic device test to execute smoothly without any interruption thereby reducing the time and cost of developing the electronic device.
    Type: Application
    Filed: February 22, 2006
    Publication date: May 24, 2007
    Inventors: Yi-Chang Wu, Yi-Hsun Chen, Sen-Ta Chan
  • Patent number: 7222266
    Abstract: A monitor circuit has a first detection module for detecting an input signal and for generating a first examining signal according to the input signal, a second detection module electrically connected to the first detection module for generating an output signal according to the first examining signal, and a control unit electrically connected to the first and the second detection modules selectively for controlling the second detection module to generate the output signal according to the first examining signal, for controlling the first detection module to monitor the output and to generate a second examining signal, or for comparing the first examining signal with the second examining signal so as to determine if the monitor circuit is functioning normally.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: May 22, 2007
    Assignee: Wistron Corporation
    Inventors: Yi-Chang Wu, Yi-Hsun Chen, Sen-Ta Chan
  • Patent number: 7211016
    Abstract: A geared motor includes a rotor mounted rotatably to a motor housing and having an output shaft along a rotating axis, and a stator secured to the motor housing to surround the rotor. The stator has a plurality of angularly displaced core segments with wall areas confronting magnetic pole units on the rotor, and a plurality of windings wound respectively around the core segments to create a torque so as to drive the output shaft. A planetary gear assembly includes a sun wheel mounted on the output shaft, an annulus secured to the motor housing and having an internally toothed annular surface, and a planet wheel meshing with the toothed surface and the sun wheel. A rotary member is rotated by a speed reduction drive transmitted from the planet wheel about a transmitting axis aligned with the rotating axis.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: May 1, 2007
    Assignee: National Cheng Kung University
    Inventors: Hong-Sen Yan, Yi-Chang Wu
  • Patent number: 7114102
    Abstract: A monitoring system includes a data input/output device, a processing device, a memory device and a transmission device. The data input/output device is coupled electrically to a host and a managing system for handling data transmission therebetween. The processing device is used to verify data that is transmitted to the data input/output device. The memory device is used to store the data verified by the processing device therein. The transmission device is adapted to establish a network connection with the managing system, and is operable so as to selectively route the data verified by the processing device to the network connection for reception by the managing system. A method for monitoring and processing screen data transmitted between a host and a managing system is also disclosed.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: September 26, 2006
    Assignee: Wistron Corporation
    Inventors: Sen-Ta Chan, Yi-Chang Wu, Yi-Hsun Chen
  • Publication number: 20060111214
    Abstract: A geared motor includes a rotor mounted rotatably to a motor housing and having an output shaft along a rotating axis, and a stator secured to the motor housing to surround the rotor. The stator has a plurality of angularly displaced core segments with wall areas confronting magnetic pole units on the rotor, and a plurality of windings wound respectively around the core segments to create a torque so as to drive the output shaft. A planetary gear assembly includes a sun wheel mounted on the output shaft, an annulus secured to the motor housing and having an internally toothed annular surface, and a planet wheel meshing with the toothed surface and the sun wheel. A rotary member is rotated by a speed reduction drive transmitted from the planet wheel about a transmitting axis aligned with the rotating axis.
    Type: Application
    Filed: March 4, 2005
    Publication date: May 25, 2006
    Inventors: Hong-Sen Yan, Yi-Chang Wu
  • Publication number: 20050223207
    Abstract: A method and apparatus thereof for flashing a BIOS of a data processing system remotely are provided. A BIOS flash instruction is given remotely from a remote console, transmitted to a microprocessor and a corresponding storage media of the data processing system via network, where the microprocessor is irresponsible for operating system. A BIOS image file is identified correct before performing BIOS of a system microprocessor that is responsible for operating system, where the system microprocessor is usually CPU. BIOS is remotely flashed with this method and apparatus, and since flash operation is performed independently of the operating system of the data processing system, BIOS re-flash can be performed and data processing system can be rebooted even when flash operation is failed or operating system is disable.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 6, 2005
    Inventors: Sen-Ta Chan, Yi-Hsun Chen, Chao-Sheng Hsu, Yi-Chang Wu, Wen-Pin Huang
  • Publication number: 20050160323
    Abstract: A monitor circuit has a first detection module for detecting an input signal and for generating a first examining signal according to the input signal, a second detection module electrically connected to the first detection module for generating an output signal according to the first examining signal, and a control unit electrically connected to the first and the second detection modules selectively for controlling the second detection module to generate the output signal according to the first examining signal, for controlling the first detection module to monitor the output and to generate a second examining signal, or for comparing the first examining signal with the second examining signal so as to determine if the monitor circuit is functioning normally.
    Type: Application
    Filed: April 8, 2004
    Publication date: July 21, 2005
    Inventors: Yi-Chang Wu, Yi-Hson Chen, Sen-Ta Chan
  • Patent number: 6871291
    Abstract: A method for recording power failure time of a computer system. The computer system includes a power supply for generating a power signal, a memory for recording data, and a processor for processing data. The processor has a power port connected to the power supply for receiving the power signal, an input port for receiving a power good signal, and an output port connected to the memory for outputting the power failure time of the computer system to the memory. The recording method includes writing a power failure time and a check number into the memory when the input port of the processor does not receive the power good signal, and when the power signal has dropped below a threshold voltage.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: March 22, 2005
    Assignee: Wistron Corporation
    Inventors: Sen-Ta Chan, Yi-Chang Wu, Yi-Hsun Chen
  • Publication number: 20040019834
    Abstract: A monitoring system includes a data input/output device, a processing device, a memory device and a transmission device. The data input/output device is coupled electrically to a host and a managing system for handling data transmission therebetween. The processing device is used to verify data that is transmitted to the data input/output device. The memory device is used to store the data verified by the processing device therein. The transmission device is adapted to establish a network connection with the managing system, and is operable so as to selectively route the data verified by the processing device to the network connection for reception by the managing system. A method for monitoring and processing screen data transmitted between a host and a managing system is also disclosed.
    Type: Application
    Filed: January 8, 2003
    Publication date: January 29, 2004
    Applicant: WISTRON CORPORATION
    Inventors: Sen-Ta Chan, Yi-Chang Wu, Yi-Hsun Chen
  • Publication number: 20030140259
    Abstract: A method for recording power failure time of a computer system. The computer system includes a power supply for generating a power signal, a memory for recording data, and a processor for processing data. The processor has a power port connected to the power supply for receiving the power signal, an input port for receiving a power good signal, and an output port connected to the memory for outputting the power failure time of the computer system to the memory. The recording method includes writing a power failure time and a check number into the memory when the input port of the processor does not receive the power good signal, and when the power signal has dropped below a threshold voltage.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 24, 2003
    Inventors: Sen-Ta Chan, Yi-Chang Wu, Yi-Hsun Chen