Patents by Inventor Yi Chang

Yi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071981
    Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Publication number: 20240071833
    Abstract: The present disclosure relates to a semiconductor device with a hybrid fin-dielectric region. The semiconductor device includes a substrate, a source region and a drain region laterally separated by a hybrid fin-dielectric (HFD) region. A gate electrode is disposed above the HFD region and the HFD region includes a plurality of fins covered by a dielectric and separated from the source region and the drain region by the dielectric.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Huan Chen, Huan-Chih Yuan, Yu-Chang Jong, Scott Yeh, Fei-Yun Chen, Yi-Hao Chen, Ting-Wei Chou
  • Publication number: 20240072685
    Abstract: A power converter to supply power to each phase of a three-phase motor includes a booster circuit connected to a DC power supply to boost an input voltage input from the DC power supply in response to a pulse width modulation boosting signal, an inverter connected to the booster circuit and including a three-phase switching circuit including switches, and an output connected to the three-phase switching circuit to supply power to each phase of the three-phase motor, and a controller to output the pulse width modulation boosting signal to the booster circuit and output the pulse width modulation boosting signal to the booster circuit when detecting that the booster circuit is in a boosted state.
    Type: Application
    Filed: September 30, 2020
    Publication date: February 29, 2024
    Inventors: Ming Tsan LIN, Yi-Shiang OUYANG, Hsin-Chang YU
  • Publication number: 20240069636
    Abstract: A touch device includes a touch panel, a circuit board, a vibrating unit and a pressure detection module. The touch panel includes two press regions. When different press regions of the touch panel are pressed by the user, the vibration feedback values generated by different press regions are different.
    Type: Application
    Filed: September 14, 2022
    Publication date: February 29, 2024
    Inventors: Chieh-Hung Hsieh, Wei-Chiang Huang, Chao-Wei Lee, Hsueh-Chao Chang, Sian-Yi Chiu
  • Publication number: 20240071287
    Abstract: An LED display device includes a system board, and multiple daughterboards that are assembled on the system board. The system board includes a drive power circuit, a first gate circuit and a second gate circuit. Each daughterboard includes a substrate, multiple LEDs that are disposed on the substrate, multiple first transistor switches that are respectively connected to the LEDs, and at least one second transistor switch that is connected to the LEDs. With respect to each daughterboard, the first transistor switches and the at least one second transistor switch cooperatively control current flows through the LEDs; the first transistor switches are further connected to the drive power circuit to respectively receive multiple drive currents, and are further connected to the first gate circuit to receive a timing signal; and the at least one second transistor switch is further connected to the second gate circuit to receive a timing signal.
    Type: Application
    Filed: June 21, 2023
    Publication date: February 29, 2024
    Applicant: MACROBLOCK, INC.
    Inventors: Li-Chang YANG, Yi-Sheng LIN
  • Publication number: 20240071294
    Abstract: A light emitting display device includes a substrate, a drive power circuit, a gate circuit unit, multiple LEDs and a power switch unit. The power switch unit includes multiple first transistor switches and at least one second transistor switch that cooperatively control current flows through the LEDs. The first transistor switches are respectively connected to first terminals of the LEDs. The at least one second transistor switch is connected to second terminals of the LEDs. The first transistor switches are further connected to the drive power circuit to receive multiple drive currents, and are further connected to the gate circuit unit to receive a timing input. The at least one second transistor switch is further connected to the gate circuit unit to receive a timing input. The light emitting display device can have reduced parasitic capacitance effect, and thus reduced power consumption and have improved display quality.
    Type: Application
    Filed: June 21, 2023
    Publication date: February 29, 2024
    Applicant: MACROBLOCK, INC.
    Inventors: Li-Chang YANG, Yi-Sheng LIN
  • Publication number: 20240074027
    Abstract: A capacitor capable of releasing reactive oxygen species and reactive nitrogen species after powering of claim 1 is composed of the dielectric material. A plurality of through holes are designed on the capacitor, the through holes being used as air gaps to supply plasma gas and blow a fan to increase the gas flow, and the voltage being connected to the two corresponding electrode edges of the capacitor so that the capacitor generating a heating temperature (lower than 200 degrees Celsius). Thereby, after the capacitor is perforated to form honeycomb shape and powered, the air surrounding the capacitor flowing through the capacitor is ionized to the oxygen ion and nitrogen ion via heating and charge-discharge, generates plasma at room temperature and atmospheric pressure and releases the reactive oxygen ions and reactive nitrogen ions healing and helpful for body healing.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: Chung-Tai Chang, Chia-Hao Chang, Ting-Yi Chang
  • Patent number: 11917795
    Abstract: A heat sink structure includes a base seat and at least one heat dissipation unit. The base seat has a first face and a second face. At least one extension column extends from the second face of the base seat. The heat dissipation unit is disposed above the base seat and spaced from the base seat by a gap. The extension column serves to restrict or secure the heat dissipation unit in horizontal and vertical directions. The heat dissipation unit with different structures provides multiple heat dissipation features to enhance the entire heat dissipation performance.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: February 27, 2024
    Assignee: Asia Vital Components Co., Ltd.
    Inventors: Yuan-Yi Lin, Fu-Kuei Chang
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang
  • Patent number: 11916098
    Abstract: An integrated inductor is provided. The integrated inductor includes a first winding and a second winding, and has a first end, a second end, and a node. The first winding utilizes the first end and the node as two ends thereof and includes a first coil and a second coil, which do not overlap. The second winding utilizes the second end and the node as two ends thereof and includes a third coil and a fourth coil, which do not overlap. The first coil and the third coil have an overlapping area, and the second coil and the fourth coil have an overlapping area. The first coil is surrounded by the third coil, and the fourth coil is surrounded by the second coil.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 27, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
  • Patent number: 11916018
    Abstract: A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chen-Yi Weng, Shih-Che Huang, Ching-Li Yang, Chih-Sheng Chang
  • Patent number: 11912664
    Abstract: Provided herein are methods, systems, kits, and compositions useful for determining small molecule-protein interactions and protein-protein interactions. The photo-click tags provided herein can be conjugated to a small molecule or amino acid analog to provide compounds that can be integrated into a protein through photo-conjugation, allowing for identification of a small molecule-protein interaction or protein-protein interaction to elucidate the small molecules mechanism of action or the protein targeted by the small molecule. In some embodiments, the photo-click tags comprise a photo-conjugation moiety and a click chemistry handle, allowing for the attachment of various functional groups (e.g., affinity tags) to the small molecule or amino acid analog.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: February 27, 2024
    Assignee: President and Fellows of Harvard College
    Inventors: Christina M. Woo, Jinxu Gao, Yuka Amako, Chia Fu Chang, Zhi Lin, Hung-Yi Wu
  • Patent number: 11911031
    Abstract: This disclosure relates to a surgical tool configured for holding an implant includes an inner rod and a sleeve. The inner rod includes a rod portion and a holding portion. The holding portion is located at one end of the rod portion and has a first accommodation space configured for accommodating at least part of the implant. The sleeve includes a sleeving portion and a retaining portion. The sleeving portion is slidably sleeved on the rod portion of the inner rod. The retaining portion is located at one end of the sleeving portion and selectively presses against the holding portion. The inner rod further includes at least one fin portion protruded from the holding portion and located in the first accommodation space for being inserted into at least one slot of the implant.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: February 27, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Fang-Chieh Chang, Pei-I Tsai, Shu-Fen Yeh, Kuo-Yi Yang, Chih-Chieh Huang
  • Patent number: 11917923
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Patent number: 11916132
    Abstract: Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wan-Yi Kao, Hung Cheng Lin, Che-Hao Chang, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11915980
    Abstract: Metal gate cutting techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes receiving an integrated circuit (IC) device structure that includes a substrate, one or more fins disposed over the substrate, a plurality of gate structures disposed over the fins, a dielectric layer disposed between and adjacent to the gate structures, and a patterning layer disposed over the gate structures. The gate structures traverses the fins and includes first and second gate structures. The method further includes: forming an opening in the patterning layer to expose a portion of the first gate structure, a portion of the second gate structure, and a portion of the dielectric layer; and removing the exposed portion of the first gate structure, the exposed portion of the second gate structure, and the exposed portion of the dielectric layer.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Yi Tsai, Yi-Hsuan Hsiao, Shu-Yuan Ku, Ryan Chia-Jen Chen, Ming-Ching Chang
  • Publication number: 20240058241
    Abstract: Disclosed herein is a skin whitening composition that includes, based on a total volume of the skin whitening composition, 0.5 ?M to 10 ?M of resveratrol, and 2.5 ?M to 500 ?M of nicotinamide mononucleotide.
    Type: Application
    Filed: January 19, 2023
    Publication date: February 22, 2024
    Inventors: Tsong-Min CHANG, Shr-Shiuan WANG, Yi-Chang LI, Huey-Chun HUANG, Ya-Hui CHANG, Hui-Hsin YANG
  • Publication number: 20240052577
    Abstract: A forming machine for a pulp product includes a frame unit defining a forming zone, two hot pressing zones, and two demolding zones; a forming unit disposed in the forming zone and including a forming mold for scooping pulp from a pulp tank and forming a blank unit thereon for every scoop of the pulp; a lower mold unit including four lower molds movable relative to the frame unit along a vertical direction, and an upper mold unit movable between two positions along a moving direction in a repetitive manner and including two upper hot-pressing central molds and two upper hot-pressing transfer molds. The upper mold unit is engageable with the forming mold and a corresponding one of the lower molds in different positions.
    Type: Application
    Filed: June 13, 2023
    Publication date: February 15, 2024
    Inventors: Chun-Hsiung CHEN, Kao-Yi CHANG
  • Patent number: 11900953
    Abstract: An audio processing method includes the following operations. A calculated value is obtained according to multiple audio clock frequency information contained in multiple audio input packets. An audio sampling frequency is generated according to the calculated value and a link symbol clock signal. Multiple audio output packets corresponding to the audio input packets are generated according to the audio sampling frequency.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chun-Chang Liu, Jing-Chu Chan, Hung-Yi Chang
  • Patent number: D1015323
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: February 20, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang, Sheng-Hung Lee