Patents by Inventor Yi Chen

Yi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11912595
    Abstract: The present invention relates to a groundwater circulation well system with pressure-adjustable hydrodynamic cavitation, including a circulation well body, a sucked and injected water circulation assembly and a hydrodynamic cavitator. The sucked and injected water circulation assembly is based on a water suction and injection pump. The hydrodynamic cavitator is provided, inside a vortex chamber, with a vortex water inlet column capable of changing a water passing aperture. The hydrodynamic cavitator is capable of changing a bubbling pressure and a breaking pressure of hydrodynamic cavitation bubbles in the vortex water inlet column. The hydrodynamic cavitator generates vortices in the circulation well body to accelerate uniform mixing of a remediation agent and the groundwater. Energy from collapsing and bursting of the hydrodynamic cavitation bubbles activates the remediation agent such that contaminants in the groundwater are efficiently degraded.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: February 27, 2024
    Assignee: CHENGDU UNIVERSITY OF TECHNOLOGY
    Inventors: Shengyan Pu, Hui Ma, Yuming He, Xiaoguang Wang, Guangyong Zeng, Yi Chen, Dong Yu, Wenwen Ji
  • Patent number: 11916124
    Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yi Lee, Ji-Cheng Chen, Cheng-Lung Hung, Chi On Chui
  • Patent number: 11915379
    Abstract: The disclosure provides a display image adjustment method and an augmented reality display device. The display image adjustment method includes the following steps. Received image data is converted to a coordinate system of the augmented reality display device to obtain initial coordinate information. An initial image is provided to an active display region of the augmented reality display device based on the initial coordinate information. The initial coordinate information is adjusted in a virtual adjustment coordinate region to obtain adjusted coordinate information when an adjustment command is received. An adjusted image is provided to the active display region of the augmented reality display device based on the adjusted coordinate information. The display image adjustment method and the augmented reality display device proposed by the disclosure may adjust display content of the AR display device according to user's needs.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: February 27, 2024
    Assignee: Coretronic Corporation
    Inventors: Shih-Min Wu, Yi-Fa Wang, Ping-Chen Ma
  • Patent number: 11916471
    Abstract: An example electronic device includes a controller to determine a user touch detection by a power adaptor coupled to the electronic device to operate the electronic device in an AC power mode. The power adaptor may comprise a proximity sensor to detect a user touch for detachment of the power adaptor from the electronic device, and a control circuit to operate a configuration pin in a low output mode to signal user touch detection. The controller may initiate central processing unit (CPU) throttling to reduce power consumption by the electronic device. The controller may further stop CPU throttling in response to detecting that the power adaptor has been detached from the electronic device. Further, the controller may switch the electronic device to a DC power mode to operate using DC power supplied by a battery of the electronic device in response to power adaptor detachment.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: February 27, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ting-Yang Tsai, Yi-Chen Chen, Ching-Lung Wang, Yu-Min Shen
  • Patent number: 11912708
    Abstract: The present disclosure provides compounds and pharmaceutically acceptable salt thereof, and methods of using the same. The compounds and methods have a range of utilities as therapeutics, diagnostics, and research tools. In particular, the subject compositions and methods are useful for reducing signaling output of oncogenic proteins.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: February 27, 2024
    Assignee: KUMQUAT BIOSCIENCES INC.
    Inventors: Baogen Wu, Pingda Ren, Zhiyong Chen, Yi Liu
  • Patent number: 11914429
    Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Yen-Chieh Chiu, Yu-Wen Lin, Yen-Chou Chueh, Po-Yi Lee
  • Patent number: 11916843
    Abstract: Aspects of the present disclosure provide techniques for triggering generation and transmission of a channel state information (CSI) report by the user equipment (UE) on physical uplink shared channel (PUSCH) in response to issuance of at least one downlink grant by the base station.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Wanshi Chen, Yi Huang, Peter Gaal
  • Patent number: 11916025
    Abstract: A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Tzuan-Horng Liu, Chia-Hung Liu, Hao-Yi Tsai
  • Patent number: 11916022
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
  • Patent number: 11915957
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11917617
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a configuration of a set of resources for sidelink coordination information requests. The UE may transmit a sidelink coordination information request message in at least one resource selected from the set of resources for sidelink coordination information requests. Numerous other aspects are provided.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: February 27, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Seyedkianoush Hosseini, Peter Gaal, Wanshi Chen, Tugcan Aktas, Yi Huang, Wei Yang, Hwan Joon Kwon
  • Publication number: 20240064117
    Abstract: A signal compensation device includes a first receiving circuit, a second receiving circuit, a first buffer, a second buffer, a third buffer, and a processing circuit. The first receiving circuit receives a first video signal from a first video source. The second receiving circuit receives a second video signal from a second video source, wherein both the first video signal and the second video signal correspond to a same program. The first buffer stores a first transport stream (TS) packet group corresponding to the first video signal. The second buffer stores a second TS packet group corresponding to the second video signal. The processing circuit dynamically stores a first TS packet of the first TS packet group or a second TS packet of the second TS packet group to the third buffer according to a predetermined source in response to TS packet status.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 22, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chun-Yi Chen
  • Publication number: 20240058457
    Abstract: The disclosure includes compounds of any one of Formulae (0)-(5), (A)-(E), (1)-(V), (11)-(20), as described herein. Also disclosed is a method for treating a neoplastic disease, autoimmune disease, and inflammatory disorder with these compounds.
    Type: Application
    Filed: December 17, 2021
    Publication date: February 22, 2024
    Applicant: Newave Pharmaceutical Inc.
    Inventor: Yi Chen
  • Publication number: 20240063288
    Abstract: A semiconductor device includes first and second gate structures over a substrate, the first gate structure has a first width that is smaller than a second width of the second gate structure, in which a lower portion of the first gate structure having a first work-function material (WFM) layer, the first WFM layer having a top surface, a lower portion of the second gate structure having a second WFM layer, the second WFM layer having a top surface. A first gate electrode is disposed over the first WFM layer and a second gate electrode has a lower portion disposed in the second WFM layer, in which the first gate electrode has a first width that is smaller than a second width of the second gate electrode, and wherein the top surface of the second WFM layer is at a level below a top surface of the second gate electrode.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 22, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chen LO, Jung-Hao CHANG, Li-Te LIN, Pinyen LIN
  • Patent number: 11903950
    Abstract: The disclosure includes compounds of Formula (A), wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, and R11, h, j, m, n, k, v, s, g, V, W, L, Z1, Q1, Q2, Q3, Q4, Q5, Q6, and Q7, are defined herein. Also disclosed is a method for treating a neoplastic disease, an autoimmune disease, or a neorodegenerative disease with these compounds.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: February 20, 2024
    Assignee: Newave Pharmaceutical Inc.
    Inventor: Yi Chen
  • Patent number: 11910538
    Abstract: In one example, an electronic device housing may include a substrate, an insulating adhesive layer formed on a surface of the substrate, a patterned electroless plating layer formed on the insulating adhesive layer, and a patterned electrolytic plating layer formed on the patterned electroless plating layer.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 20, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yi-Chen Chen, Kun Cheng Tsai, Kuan-Ting Wu, Ying-Hung Ku, Hsueh Chen Hung
  • Patent number: 11909123
    Abstract: A multibeam antenna including a substrate, and further includes an antenna element, a first guiding apparatus, and a second guiding apparatus disposed on the substrate. The antenna element includes a first pole configured to receive a feeding signal and a second pole that is grounded. The first guiding apparatus enables a first beam generated by the antenna element to radiate in a first direction, and the second guiding apparatus enables a second beam generated by the antenna element to radiate in a second direction. A phase center of the antenna element is at an intersecting point of a first axis and a second axis, the first axis passing through a phase center of the first guiding apparatus and parallel to the first direction, and the second axis passing through a phase center of the second guiding apparatus and parallel to the second direction.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: February 20, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Long Kong, Min Yu, Yi Chen
  • Patent number: 11907636
    Abstract: A method of generating an IC layout diagram includes receiving a first gate resistance value of a gate region in an IC layout diagram, the first gate resistance value corresponding to a location of a gate via positioned within an active region and along a width of the gate region extending across the active region, determining a second gate resistance value based on the location and the width, using the first and second resistance values to determine that the IC layout diagram does not comply with a design specification, and based on the non-compliance with the design specification, modifying the IC layout diagram.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ke-Ying Su, Jon-Hsu Ho, Ke-Wei Su, Liang-Yi Chen, Wen-Hsing Hsieh, Wen-Koi Lai, Keng-Hua Kuo, Kuopei Lu, Lester Chang, Ze-Ming Wu
  • Publication number: 20240057343
    Abstract: Provided are ferroelectric tunnel junction (FTJ) structures, memory devices, and methods for fabricating such structures and devices. An FTJ structure includes a first electrode, a ferroelectric material layer, and a catalytic metal layer in contact with the ferroelectric material layer.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuen-Yi Chen, Yu-Sheng Chen, Yi Ching Ong, Kuo-Ching Huang
  • Patent number: D1015123
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: February 20, 2024
    Inventors: Yi-Hsuan Chen, Yi-Chen Chen