Patents by Inventor Yi Chen

Yi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966322
    Abstract: A method, computer program product and system are provided for preloading debug information based on the presence of incremental source code files. Based on parsed input parameters to a source code debugger, a source code repository and a local storage area are searched for an incremental file. In response to the incremental file being located, a preload indicator in the incremental file, which is a source code file, is set. Based on the preload indicator being set, debug symbol data from the incremental file is merged to a preload symbol list. In response to receiving a command to examine the debug symbol data from the incremental file, the preload symbol list is searched for the requested debug symbol data.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: April 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiao Ling Chen, Xiao Xuan Fu, Jiang Yi Liu, Zhan Peng Huo, Wen Ji Huang, Qing Yu Pei, Min Cheng, Yan Huang
  • Patent number: 11967622
    Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Patent number: 11965833
    Abstract: A detection device includes a frame, a transport mechanism, detection mechanisms, and a grasping mechanism. The transport mechanism includes a feeding line, a first flow line, and a second flow line arranged in parallel on the frame. The detection mechanisms are arranged on the frame and located on two sides of the transport mechanism. The grasping mechanism is arranged on the frame and used to transport workpieces on the feeding line to the detection mechanisms, transport qualified workpieces to the first flow line, and transport unqualified workpieces to the second flow line.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: April 23, 2024
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jing-Zhi Hou, Lin-Hui Cheng, Yan-Chao Ma, Jin-Cai Zhou, Zi-Long Ma, Neng-Neng Zhang, Yi Chen, Chen-Xi Tang, Meng Lu, Peng Zhou, Ling-Hui Zhang, Lu-Hui Fan, Shi-Gang Xu, Cheng-Yi Chao, Liang-Yi Lu
  • Patent number: 11966587
    Abstract: A method for optimizing a Polar-RNNA quantizer of MLC NAND flash based on deep learning comprises the following steps: Step S1: transforming an MLC flash detection task into a deep learning task, and obtaining three hard-decision read thresholds based on a neural network; Step S2: expanding six soft-decision read thresholds based on the three hard-decision read thresholds; Step S3: constructing an LLR mapping table, and obtaining new LLR information of MLC flash based on the LLR mapping table; Step S4: symmetrizing an MLC flash channel, and performing density evolution; and Step S5: optimizing the soft-decision read thresholds based on a genetic algorithm to obtain an optimal quantization interval. According to the invention, polar codes can be directly used for MLC flash channels without the arduous work of MLC flash channel modeling, so that the reliability of MLC flash is effectively improved.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 23, 2024
    Assignee: FUZHOU UNIVERSITY
    Inventors: Pingping Chen, Zhen Mei, Yi Fang, Xu Luo, Zhijian Lin, Feng Chen, Riqing Chen
  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
  • Patent number: 11967591
    Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Ching-Yi Lin, Jyh Chwen Frank Lee
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11966077
    Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 23, 2024
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
  • Publication number: 20240127783
    Abstract: Provided are a noise cancellation method and apparatus, an electronic device, a noise cancellation earphone, and a storage medium. The method includes acquiring original sound source information; performing noise reduction (NR) processing on the original sound source information using active noise cancellation (ANC) to obtain first sound information and performing the NR processing on the original sound source information using environmental noise cancellation (ENC) to obtain second sound information; and mixing and adding the first sound information and the second sound information to obtain target sound information and playing the target sound information. In this method, the NR processing can be performed on the sound using the ANC and the ENC, thereby distinguishing environmental noise from human voice, improving the noise cancellation performance, and enabling a user to hear clearer sound.
    Type: Application
    Filed: April 3, 2023
    Publication date: April 18, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Che-Yung Huang, Chi-Liang Chen, Yong-Sheng Jheng, Che-Yi HSIAO
  • Publication number: 20240128214
    Abstract: An integrated circuit structure includes an aluminum pad layer on a dielectric stack, a passivation layer covering the aluminum pad layer, and an aluminum shield layer including aluminum routing patterns disposed directly above an embedded memory area and embedded in the dielectric stack. The aluminum shield layer is electrically connected to the uppermost copper layer through a plurality of tungsten vias. The plurality of tungsten vias is embedded in the dielectric stack.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Aaron Chen, Chi Ren, Yi Hsin Liu
  • Publication number: 20240128537
    Abstract: A self-heating control method and a self-heating control system for a rechargeable battery are disclosed. The rechargeable battery includes a battery core. A separator is provided between a positive electrode and a negative electrode of the battery core. A reference electrode is correspondingly provided at the separator. A surface electrode is correspondingly provided on the negative electrode surface of the battery core. The method includes: detecting the potential difference between the reference electrode and the surface electrode, generating a charging current adjustment instruction according to the potential difference between the reference electrode and the surface electrode, and adjusting the charging current of the rechargeable battery according to the charging current adjustment instruction during the self-heating process of the rechargeable battery.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 18, 2024
    Inventors: Ke ZHANG, Na CHEN, Jiannian LI, Yi PAN, Zizhu GUO
  • Publication number: 20240127111
    Abstract: The present disclosure discloses an Internet-of-Things-oriented machine learning container image download system and a method. The Internet-of-Things-oriented machine learning container image download system includes a master node and a plurality of computing nodes; the master node is configured to store and convert a machine learning model, and build a machine learning container image from the format-converted machine learning model; and issue an image download instruction to each of the computing nodes after image information of the machine learning container image is completely built; and each of the computing nodes is configured to receive the image download instruction, download the machine learning container image, and start a machine learning container; and receive data collected by Internet-of-Things devices, and return a data processing result to the Internet-of-Things devices.
    Type: Application
    Filed: January 9, 2023
    Publication date: April 18, 2024
    Applicant: NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Dengyin ZHANG, Zijie LIU, Haoran CHEN, Yi CHENG, Can CHEN, Mengda ZHU, Hui XU
  • Publication number: 20240128375
    Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.
    Type: Application
    Filed: March 16, 2023
    Publication date: April 18, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yi CHANG, Yu Ying CHEN, Zhen-Cheng WU, Chi On CHUI
  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20240127005
    Abstract: Methods, systems, and computer program products for translating text using generated visual representations and artificial intelligence are provided herein. A computer-implemented method includes generating a tokenized form of at least a portion of input text in a first language; generating at least one visual representation of at least a portion of the input text using a first set of artificial intelligence techniques; generating a tokenized form of at least a portion of the at least one visual representation; and generating an output including a translated version of the input text into at least a second language by processing, using a second set of artificial intelligence techniques, at least a portion of the tokenized form of the at least a portion of the input text and at least a portion of the tokenized form of the at least a portion of the at least one visual representation.
    Type: Application
    Filed: September 28, 2022
    Publication date: April 18, 2024
    Inventors: Rameswar Panda, Yi Li, Richard Chen, Rogerio Schmidt Feris, Yoon Hyung Kim, David Cox
  • Publication number: 20240128324
    Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
  • Publication number: 20240126376
    Abstract: A computing system includes: a first input device for receiving a first input data from a user, the first input device includes a computing module for processing a data inputted from the first input device and generating an output data; and a head mounted display, telecommunicatively connected to the first input device by a communication module, for receiving the output data and displaying a binocular virtual image related to the output data; wherein the head mounted display has a first light direction adjuster and a second light direction adjuster for changing the direction of a first light signal and a second light signal emitted by a first emitter and a second emitter respectively, such that the first light signal and the second light signal are emitted relative to the first angle and the second angle of the user's frontal plane towards a first eye and a second eye respectively.
    Type: Application
    Filed: July 7, 2023
    Publication date: April 18, 2024
    Applicant: HES IP HOLDINGS, LLC
    Inventors: Sheng-Lan TSENG, Yi-An CHEN, Yung-Chin HSIAO
  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Patent number: D1024170
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: April 23, 2024
    Assignee: WINNERS' SUN PLASTIC & ELECTRONIC (SHENZHEN) CO., LTD.
    Inventors: Yi Bing Peng, Guoqiang He, Laiyi Chen
  • Patent number: D1024400
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 23, 2024
    Inventor: Yi Chen