Abstract: A microfluidic cell culture apparatus includes a cell retention chamber and a perfusion channel. The cell retention chamber has a structured surface. The structured surface includes a major surface from which a plurality of projections extends into the chamber. The plurality of projections are arranged to suspend cells cultured in the chamber above the major surface. The first perfusion channel is configured to provide laminar flow of a fluid through the channel and forms a plurality of openings in communication with the cell retention chamber. The openings are configured to prevent cells from the retention chamber from entering the perfusion channel.

Abstract: A touch control apparatus includes a touch panel and a sensing control apparatus. The touch panel includes a plurality of sensing lines, and the sensing control apparatus includes a plurality of pins that are respectively coupled to the sensing lines. The sensing control apparatus adaptively controls a sequence for scanning the pins according to connection relationships between the pins and the sensing lines.

Abstract: A digital apparatus includes a timing control circuit, a period counter, a phase digitizer and a calculation circuit. The timing control circuit generates a first control signal according to a square wave signal and a predetermined value. The period counter generates a first digital value according to a reference clock signal and the first control signal. The phase digitizer generates a second digital value according to a phase difference between the square wave signal and the reference clock signal. The calculation circuit generates an output digital value according to the first digital value and the second digital value. An object of obtaining a high-resolution digitization with a reasonable sampling clock is realized by effectively combining the period counter with the phase digitizer.

Abstract: An article for culturing cells includes a substrate on which cells can be cultured. The substrate has a base surface. An array of projections extends from the base surface. The projections have a height of about 1 micrometer to about 100 micrometers, and have a gap distance along the major surface from center to center between neighboring projections of about 10 micrometers to 80 micrometers. A plurality of arrays of projections may extend from the surface with gaps in the base surface between the arrays. Hepatocytes cultures on such microprojection array substrates maintained in vivo like morphology and membrane polarity. Hepatocytes co-cultured with helper cells on such substrates tended to grow in the area of the arrays, while the helper cells tended to grow in the areas between the arrays.

Abstract: A touch sensing method and associated circuit are provided. In one aspect, a touch control circuit includes a first current source, a second current source, a plurality of switches, a hysteresis comparator, a frequency divider and a flip-flop. The switches are couple to a plurality of external contact points. The hysteresis comparator is coupled to a first reference comparison voltage and a second reference comparison voltage. Each of the external contact points is selectively coupled to an input terminal of the hysteresis comparator through the switches. The first current source and the second current source are coupled to the input terminal of the hysteresis comparator to generate a sensing voltage. The hysteresis comparator compares the sensing voltage with the first reference comparison voltage and the second reference comparison voltage to generate a hysteresis comparison output to control the first current source or the second current source.

Abstract: A memory access circuit is provided. The memory access circuit includes a latch circuit, a feedback reset circuit, and a gate latch circuit. The latch circuit receives a high level input signal and outputs a first signal. The feedback reset circuit generates a second signal and a reset signal according to the first signal. The gate latch circuit generates a pre-charge signal and an enable signal according to the first signal and the second signal. The memory is accessed according to the pre-charging signal and the enable signal.

Abstract: A memory access circuit is provided. The memory access circuit includes a latch circuit, a feedback reset circuit, and a gate latch circuit. The latch circuit receives a high level input signal and outputs a first signal. The feedback reset circuit generates a second signal and a reset signal according to the first signal. The gate latch circuit generates a pre-charge signal and an enable signal according to the first signal and the second signal. The memory is accessed according to the pre-charging signal and the enable signal.