Abstract: The present invention discloses a pulse width modulation driving IC. The pulse width modulation driving IC includes a first pin, for receiving a first signal, a second pin, for receiving a second signal, a comparing unit, for comparing the first signal with a reference voltage, to generate a comparison result indicating a operating mode of the pulse width modulation driving IC, and an output unit, for outputting a pulse width modulation output signal according to the first signal, the second signal and the comparison result.

Abstract: A method and system for secure call Dual-Tone Multi-Frequency (DTMF) signaling includes entering (202) dial string of a telephone number of a destination device, assigning (210, 212) the dial string to a predefined string having a total length that is greater than the dial string such that there will be at least one leading hexadecimal bit in the predefined string length that is not used when the entered dial string is converted to a hexadecimal, converting (214) the dial string to hexadecimal, reversing the order of the hexadecimal, and placing the reversed hexadecimal at the beginning of the predefined string, appending (216) “one” bits to the predefined string length indicating how many nibbles of the predefined string length are unused, if any, and appending the remaining intervening unused bits in the predefined string length to “zero” bits, and sending (226) the encoded string length.

Abstract: Devices that are enabled to communicate with each other via an ad hoc conference mode and an infrastructure supported conference mode, are provided with processing capabilities that can allow them to evaluate one or more resources required to support an ad hoc conference communication session and/or one or more quality metrics associated with the ad hoc conference communication session, and determine whether one or more resources or metrics are outside optimal operating parameters. If so, the processing logic can initiate a transition from the ad hoc conference communication session to an infrastructure supported conference communication session hosted at a conference server.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor is disclosed. At first, a substrate on which a gate structure is formed is provided. Afterward, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a plurality of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

Abstract: A method and system for secure call Dual-Tone Multi-Frequency (DTMF) signaling includes entering (202) dial string of a telephone number of a destination device, assigning (210, 212) the dial string to a predefined string having a total length that is greater than the dial string such that there will be at least one leading hexadecimal bit in the predefined string length that is not used when the entered dial string is converted to a hexadecimal, converting (214) the dial string to hexadecimal, reversing the order of the hexadecimal, and placing the reversed hexadecimal at the beginning of the predefined string, appending (216) “one” bits to the predefined string length indicating how many nibbles of the predefined string length are unused, if any, and appending the remaining intervening unused bits in the predefined string length to “zero” bits, and sending (226) the encoded string length.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

Abstract: A method for fabricating a circuitry component includes providing a semiconductor substrate, a first coil over said semiconductor substrate, a passivation layer over said first coil; and depositing a second coil over said passivation layer and over said first coil. Said second coil may be deposited by forming a first metal layer over said passivation layer, forming a pattern defining layer over said first metal layer, a first opening in said pattern defining layer exposing said first metal layer, forming a second metal layer over said first metal layer exposed by said first opening, removing said pattern defining layer, and removing said first metal layer not under said second metal layer.

Abstract: A method for fabricating a circuitry component includes providing a semiconductor substrate, a first coil over said semiconductor substrate, a passivation layer over said first coil; and depositing a second coil over said passivation layer and over said first coil. Said second coil may be deposited by forming a first metal layer over said passivation layer, forming a pattern defining layer over said first metal layer, a first opening in said pattern defining layer exposing said first metal layer, forming a second metal layer over said first metal layer exposed by said first opening, removing said pattern defining layer, and removing said first metal layer not under said second metal layer.

Abstract: Devices that are enabled to communicate with each other via an ad hoc conference mode and an infrastructure supported conference mode, are provided with processing capabilities that can allow them to evaluate one or more resources required to support an ad hoc conference communication session and/or one or more quality metrics associated with the ad hoc conference communication session, and determine whether one or more resources or metrics are outside optimal operating parameters. If so, the processing logic can initiate a transition from the ad hoc conference communication session to an infrastructure supported conference communication session hosted at a conference server.

Abstract: During a communication session (101) for a multi-network user platform (which communication session is presently occurring in a first network and is terminable by a Session Initiation Protocol server as comprises a part of that first network), one establishes (102) in the first network a Session Initiation Protocol instance as corresponds to the communication session. Thereafter, and particularly following a handoff of the communication session from the first network to a second network, one uses (104) the Session Initiation Protocol instance to maintain communications with the Session Initiation Protocol server such that the Session Initiation Protocol server does not terminate the communication session.

Abstract: During (101) a communication session for a plurality of user platforms wherein at least one of the user platforms is on hold and wherein the communication session is presently occurring in a first network and is terminable by a Session Initiation Protocol server as comprises a part of that first network, one establishes (102) in the first network a Session Initiation Protocol instance as corresponds to the communication session wherein the Session Initiation Protocol instance comprises, at least in part, session context information for the user platform that is on hold. Then, following a handoff of bearer support of the communication session from the first network to a second network, one uses (104) the Session Initiation Protocol instance to maintain the hold status of the user platform that is on hold with the Session Initiation Protocol server subsequent to the handoff such that the Session Initiation Protocol server does not terminate the communication session.

Abstract: An output buffer circuit includes a high voltage detecting circuit, a dynamic gate bias generating circuit, an output stage circuit and a pad voltage detector. The high voltage detecting circuit detects a power supply voltage and generates a first and a second determining signals and a first and a second bias voltages according to the power supply voltage. The dynamic gate bias generating circuit is biased by the first and the second bias voltages and receives the first and the second determining signals, for converting logic control signals into corresponding gate bias voltages according to the first and the second determining signals. The pad voltage detector detects a voltage of an I/O pad and provides a pad voltage detecting signal for the output stage circuit to modify an output signal outputted to an I/O pad. A mixed-voltage input/output (I/O) buffer is disclosed herein.

Abstract: An output buffer circuit includes a high voltage detecting circuit, a dynamic gate bias generating circuit, an output stage circuit and a pad voltage detector. The high voltage detecting circuit detects a power supply voltage and generates a first and a second determining signals and a first and a second bias voltages according to the power supply voltage. The dynamic gate bias generating circuit is biased by the first and the second bias voltages and receives the first and the second determining signals, for converting logic control signals into corresponding gate bias voltages according to the first and the second determining signals. The pad voltage detector detects a voltage of an I/O pad and provides a pad voltage detecting signal for the output stage circuit to modify an output signal outputted to an I/O pad. A mixed-voltage input/output (I/O) buffer is disclosed herein.

Abstract: A process scheduling system and method. The system includes a fetch module, a timing scheduling module and a trigger module. The fetch module fetches resource status data of at least one resource item of an application system periodically. The timing scheduling module dynamically determines an execution time point for at least one process according to the resource status data. The trigger module executes the process at the execution time point. The fetch module further fetches the resource status data as feedback for further determination after the process is executed.

Abstract: A driving device for driving a lamp (L) includes a power stage circuit (21), a transformer circuit (22), a voltage dividing circuit (23), an inrush current sensing circuit (24), and a controller circuit (26). The power stage circuit converts a received direct current (DC) signal to an alternating current (AC) signal. The transformer circuit is connected to the power stage circuit, for converting the AC signal to an appropriate signal to drive the lamp. The voltage dividing circuit is connected to the transformer circuit, for dividing voltage of the signal output from the transformer circuit. The inrush current sensing circuit is connected to the voltage dividing circuit, for sensing inrush current output from the transformer circuit. The controller circuit is connected to the power stage circuit, for controlling output of the power stage circuit according to output of the inrush current sensing circuit.

Abstract: A control valve assembly for spray guns comprises a flexible valve having a water-sealing portion defined by a support surface and an abutment surface conjoined to a pivoting rod via a water-stop surface disposed there-between. A water-pressure adjusting valve includes a pressure-relief section having a flow orifice to mount to a valve shaft of a pressure valve and match to the pivoting rod and the abutment surface of the flexible valve thereby. The pressure-relief section, precisely situated between a stop seat of a spray gun body and a valve seat, has a watertight ring fixed at one side to closely abut against the stop seat. A support section, extending at the other side of the water-pressure adjusting valve, has a pivoting hole defining the end portion opposite to the flow orifice thereof. Besides, the pressure valve has a positioning ring mounted to the predetermined position of the valve shaft thereon.

Abstract: Disclosed is a method that includes initiating a handoff (403) by transmitting a handoff (403) start message to a mobility manager by a first mobile station. The first mobile station is in a call with a second mobile station and moving out from a first communication network to a second communication network. The handoff start message comprises a first call context. The first communication network comprises various network entities such as a SIP server, mobility manager, and the like. The method further includes creating a SIP instance (404) in the mobility manager to hold the first call context. Further, a handoff extension call is placed (405) by the first mobile station to the SIP server via the second communication network and once the handoff extension call is placed, an INVITE message is sent (406) from the SIP server to a preconfigured extension of the mobility manager. The INVITE message comprises a second call context.

Abstract: A method for fabricating a circuitry component includes providing a semiconductor substrate, a first coil over said semiconductor substrate, a passivation layer over said first coil; and depositing a second coil over said passivation layer and over said first coil. Said second coil may be deposited by forming a first metal layer over said passivation layer, forming a pattern defining layer over said first metal layer, a first opening in said pattern defining layer exposing said first metal layer, forming a second metal layer over said first metal layer exposed by said first opening, removing said pattern defining layer, and removing said first metal layer not under said second metal layer.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.