Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.

Abstract: A waterproof click pad device includes a click pad, a frame and a waterproof unit. The frame surrounds the click pad and surrounds an axis passing through the click pad. The waterproof unit is transverse to the axis and is in sheet form. The waterproof unit includes a frame adhesive member surrounding the axis and adhered to the frame, a first non-adhesive member surrounding the axis, connected to an inner periphery of the frame adhesive member and spaced apart from and located above the frame, a second non-adhesive member surrounding the axis, connected to an inner periphery of the first non-adhesive member and spaced apart from and located above the click pad and the frame, and an plate adhesive member connected to an inner periphery of the second non-adhesive member and adhered to the click pad.

Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.

Abstract: A method for responding to a command is adapted for a storage device. The method for responding to a command includes following steps of: sequentially receiving a first command and a second command by a bridge of the storage device from a host; executing the first command and the second command to generate a status completion signal or a status error signal by the bridge; and detecting an error state of at least one of the first command and the second command to execute a response mode or an idle mode by the bridge according to the error state so as to respond to the host.

Abstract: A 2D layered thin film structure is disclosed. The 2D layered thin film structure can be applied to the growth of monocrystalline or polycrystalline group III nitrides and other 2D materials. The 2D layered thin film structure can be easily separated from the 2D layered thin film structure growth substrate, so that a single or composite nanopillar array structure formed by the monocrystalline or polycrystalline group III nitride or other 2D materials, or the 2D layered thin film structure can be transferred to any other substrate. In addition, the 2D layered thin film structure has excellent light transmittance, flexibility and component integration.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: A forming method of a processing curve in a stamping process is provided. The method includes the following steps. A plurality of processing curves are established, and an optimization target is set for the processing curves according to material characteristics of a workpiece, process requirements and a finished product CAD file. At least two of the processing curves are selected and superimposed to form a basic forming curve, wherein each subsection of the basic forming curve corresponds to a selected processing curve. Whether the selected processing curve in each subsection of the basic forming curve matches the optimization target is determined.

Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.

Abstract: A risk control system for traffic devices includes a light emitting device, a processing element and a user prompting element. The processing element is electrically connected with the light emitting device, and outputs a prompt signal. The user prompting element is electrically connected with the processing element, and receives the prompt signal.

Abstract: A unit circuit constituting each stage of a shift register serving as a gate driver of a display device charges an internal node to an H level via a transistor T2 when an output signal G(n?4) of a preceding stage turns to the H level and sets the internal node to an L level via a transistor T3 when an output signal G(n+8) of a succeeding stage turns to the H level. Each of the unit circuits of last eight stages in the gate driver is provided with a transistor T4 including a gate terminal to which the signal G(n?4) is applied and a drain terminal connected to the internal node. A signal is applied to a source terminal of the transistor T4, the signal being at the H level during a period when the internal node of any of the last eight stages is to be set to the H level, and being the L level during the other periods. This suppresses a voltage fluctuation generated in the internal node when a stabilization circuit does not normally function.

Abstract: A unit circuit constituting each stage of a shift register serving as a gate driver of a display device charges an internal node to an H level via a transistor T2 when an output signal G(n?4) of a preceding stage turns to the H level and sets the internal node to an L level via a transistor T3 when an output signal G(n+8) of a succeeding stage turns to the H level. Each of the unit circuits of last eight stages in the gate driver is provided with a transistor T4 including a gate terminal to which the signal G(n?4) is applied and a drain terminal connected to the internal node. A signal is applied to a source terminal of the transistor T4, the signal being at the H level during a period when the internal node of any of the last eight stages is to be set to the H level, and being the L level during the other periods. This suppresses a voltage fluctuation generated in the internal node when a stabilization circuit does not normally function.

Abstract: A command transforming method, applied to a command transforming system comprising a first transceiving interface and a second transceiving interface, comprising: receiving at least one command transmitted from a first device via the first transceiving interface; determining a first sequence rule of the first device and a second sequence rule of a second device, wherein the first sequence rule means if the first device is required to process the command in sequence and the second sequence rule means if the second device is required to process the command in sequence; transmitting the command to the second device via the second transceiving interface; processing the command by the second device according to the second sequence rule and transmitting a response corresponding to the command to the second transceiving interface by the second device; and transmitting the response to the first device according to the first sequence rule.

Abstract: The TFT substrate has a plurality of pixels and a plurality of TFTs (10). The TFT substrate includes a first conductive layer (12) including a gate electrode (12g) of the TFT, a gate insulating layer (13), a semiconductor layer (14), a protective insulating layer (15) including a portion covering a channel region (14c) and having a first opening portion (15a) reaching the drain electrode (14s) and a second opening portion (15b) reaching the drain region (14d), and a second conductive layer (16) including a source electrode (16s) and a drain electrode (16d). Each of the plurality of pixels has a compensation capacitance unit (30), the first conductive layer further includes a first electrode unit (12a) electrically connected to the gate electrode and forming a compensation capacitance unit, and the second conductive layer further includes a second electrode unit (16a) electrically connected to the drain electrode, overlapping the first electrode unit, and forming a compensation capacitance unit.

Abstract: A display device includes a display panel and display drivers disposed on the display panel. The distance between a first display driver and a second display driver of the display drivers is greater than the distance between a second display driver and a third display driver of the display drivers. The display panel includes a curved segment adjacent to an area between the first display driver and the second display driver.

Abstract: To a unit circuit, provided are a transistor to which a first clock signal is supplied, a transistor for applying an off-level voltage to a first node, a transistor for applying the off-level voltage to a second node, a transistor for applying an on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a forward direction scanning, a transistor for applying the on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a backward direction scanning, and a circuit for controlling a voltage of the first node based on output signals of the unit circuits in a front-side stage and a back-side stage. The unit circuit is configured so that a voltage of the second node is changed to an ON level and an OFF level while a voltage of the first node is in the OFF level and the voltage of the second node is in the ON level when the first clock signal is changed to the ON level while the voltage of the first node is in the OFF level.

Abstract: The TFT substrate has a plurality of pixels and a plurality of TFTs (10). The TFT substrate includes a first conductive layer (12) including a gate electrode (12g) of the TFT, a gate insulating layer (13), a semiconductor layer (14), a protective insulating layer (15) including a portion covering a channel region (14c) and having a first opening portion (15a) reaching the drain electrode (14s) and a second opening portion (15b) reaching the drain region (14d), and a second conductive layer (16) including a source electrode (16s) and a drain electrode (16d). Each of the plurality of pixels has a compensation capacitance unit (30), the first conductive layer further includes a first electrode unit (12a) electrically connected to the gate electrode and forming a compensation capacitance unit, and the second conductive layer further includes a second electrode unit (16a) electrically connected to the drain electrode, overlapping the first electrode unit, and forming a compensation capacitance unit.

Abstract: To a unit circuit, provided are a transistor to which a first clock signal is supplied, a transistor for applying an off-level voltage to a first node, a transistor for applying the off-level voltage to a second node, a transistor for applying an on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a forward direction scanning, a transistor for applying the on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a backward direction scanning, and a circuit for controlling a voltage of the first node based on output signals of the unit circuits in a front-side stage and a back-side stage. The unit circuit is configured so that a voltage of the second node is changed to an ON level and an OFF level while a voltage of the first node is in the OFF level and the voltage of the second node is in the ON level when the first clock signal is changed to the ON level while the voltage of the first node is in the OFF level.

Abstract: A display device includes a display panel and display drivers disposed on the display panel. The distance between a first display driver and a second display driver of the display drivers is greater than the distance between a second display driver and a third display driver of the display drivers. The display panel includes a curved segment adjacent to an area between the first display driver and the second display driver.

Abstract: An RF parameter calibration method comprises steps: measuring an open-circuit parameter, a short-circuit parameter and a load parameter of an RF parameter circuit of a tested object; respectively substituting measured values of the open-circuit parameter, the short-circuit parameter and the load parameter into a directivity error equation, a signal source matching error equation, and a reflection path error equation to obtain a directivity error, a signal source matching error, and a reflection path error; substituting the directivity error, the signal source matching error and the reflection path error into an RF parameter equation to work out an actual value of an RF parameter; examining whether the actual value of the RF parameter is smaller than a preset dB value; if yes, undertaking calibration; if no, returning to undertake measurements once again. The present invention can replace the expensive standard calibration kit and achieve more precise parameter calibration.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes providing a substrate including an isolation region, forming a resistor over the isolation region, and forming a contact over the resistor. The method also includes implanting with a dopant concentration that is step-increased at a depth of the resistor and that remains substantially constant as depth increases.