Patents by Inventor Yi Cheng

Yi Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948796
    Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: April 2, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yi-Chiau Huang, Chen-Ying Wu, Abhishek Dube, Chia Cheng Chin, Saurabh Chopra
  • Patent number: 11947266
    Abstract: A method for determining a correction relating to a performance metric of a semiconductor manufacturing process, the method including: obtaining a set of pre-process metrology data; processing the set of pre-process metrology data by decomposing the pre-process metrology data into one or more components which: a) correlate to the performance metric; or b) are at least partially correctable by a control process which is part of the semiconductor manufacturing process; and applying a trained model to the processed set of pre-process metrology data to determine the correction for the semiconductor manufacturing process.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: April 2, 2024
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Nicolaas Petrus Marcus Brantjes, Matthijs Cox, Boris Menchtchikov, Cyrus Emil Tabery, Youping Zhang, Yi Zou, Chenxi Lin, Yana Cheng, Simon Philip Spencer Hastings, Maxim Philippe Frederic Genin
  • Publication number: 20240102934
    Abstract: A test strip detecting system includes a test strip, a test strip detecting carrier and a mobile communication apparatus. The test strip detecting carrier includes a container structure, positioning markers and colorimetric calibrating blocks, and the colorimetric calibrating blocks are embedded inside the positioning markers. The test strip is placed in the container structure and reacts with a specimen to generate color blocks. The mobile communication apparatus controls an image capture unit to capture an original image of the test strip placed in the test strip detecting carrier; detects the positioning markers in the original image to obtain a plurality of coordinates of the positioning markers; performs image coordinate calibration according to the plurality of coordinates to generate a calibrated image; and performs a colorimetric calibration for the color blocks and the colorimetric calibrating blocks according to the calibrated image so as to generate a test result.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 28, 2024
    Applicant: National Cheng Kung University
    Inventors: Yu-Cheng Lin, Wei-Chien Weng, Yi-Hsuan Chen
  • Publication number: 20240102959
    Abstract: An IC structure includes a biologically sensitive field-effect transistor (BioBET) in a semiconductor substrate, and a dielectric layer over a backside surface of the semiconductor substrate. The dielectric layer has a sensing well extending through the dielectric layer to a channel region of the BioFET. The IC structure further includes a biosensing film, a plurality of fluid channel walls, and a first heater. The biosensing film lines the sensing well in the dielectric layer. The fluid channel walls are over the biosensing film and define a fluid containment region over the sensing well of the dielectric layer. The first heater is in the semiconductor substrate. The first heater has at least a portion overlapping with the fluid containment region.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung-Tsun CHEN, Yi-Hsing HSIAO, Jui-Cheng HUANG, Yu-Jie HUANG
  • Publication number: 20240103196
    Abstract: A radiographic inspection device and a method of inspecting an object are provided. The radiographic inspection device includes a support frame, where an inspection space applicable to inspect an object is formed within the support frame, and the inspection space has a first opening connecting to an outside; a transfer mechanism applicable to carry the object and move through the inspection space; a shielding curtain mounted at the first opening; and a driving mechanism. The driving mechanism includes: a driver mounted on the support frame; and a joint portion, where an upper end of the shielding curtain is connected to the joint portion. The driver is configured to synchronously drive two ends of the joint portion, so that the shielding curtain moves up and down with the joint portion to open or close the first opening.
    Type: Application
    Filed: January 18, 2022
    Publication date: March 28, 2024
    Inventors: Zhiqiang CHEN, Li ZHANG, Yi CHENG, Qingping HUANG, Mingzhi HONG, Minghua QIU, Yao ZHANG, Jianxue YANG, Lei ZHENG
  • Publication number: 20240104032
    Abstract: The address conversion system includes a storage device, a memory bus, and a processor. The processor is configured to execute the following steps: generating a real buffer on the storage device; generating a fake buffer in a fake capacity of the storage device by a fake buffer algorithm; establishing a coupling relationship between the real buffer and the fake buffer through a coupling algorithm by the coupler of the memory bus; receiving a compressed data from a first device by the real buffer; when a second device wants to read the fake buffer, the coupler guides the second device to the real buffer through the coupling relationship for reading; transmitting the compressed data of the real buffer to the coupler by the memory bus; decompressing the compressed data into a decompressed data by the coupler; and transmitting the decompressed data to the second device by the memory bus.
    Type: Application
    Filed: May 18, 2023
    Publication date: March 28, 2024
    Inventors: Kuo-Jung WU, Yi-Cheng CHEN
  • Patent number: 11942750
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Patent number: 11943373
    Abstract: An identity certificate may be issued to a blockchain node. The issuance may include issuing a first identity certificate to a first terminal and receiving a second identity certificate issuance request that is from the first terminal. A second identity certificate may be issued to the first terminal, and a third identity certificate issuance request is received from the second terminal. A third identity certificate is issued to the second terminal, so that the second terminal forwards the third identity certificate to the third terminal.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: March 26, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Mao Cai Li, Zong You Wang, Kai Ban Zhou, Chang Qing Yang, Hu Lan, Li Kong, Jin Song Zhang, Yi Fang Shi, Geng Liang Zhu, Qu Cheng Liu, Qiu Ping Chen
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Patent number: 11940412
    Abstract: A biosensor system includes an array of biosensors with a plurality of electrodes situated proximate the biosensor. A controller is configured to selectively energize the plurality of electrodes to generate a DEP force to selectively position a test sample relative to the array of biosensors.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jie Huang, Jui-Cheng Huang, Yi-Hsing Hsiao
  • Publication number: 20240092665
    Abstract: A method for treating wastewater containing ertriazole compounds is provided. Hypochlorous acid (HOCl) having a neutral to slightly acidic pH value is added to the wastewater containing triazole compounds for reaction, thereby effectively reacting more than 90% of triazole compounds.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 21, 2024
    Inventors: KUO-CHING LIN, YUNG-CHENG CHIANG, SHR-HAN SHIU, MENG-CHIH CHUNG, YI-SYUAN HUANG
  • Publication number: 20240091838
    Abstract: A forming method of a processing curve in a stamping process is provided. The method includes the following steps. A plurality of processing curves are established, and an optimization target is set for the processing curves according to material characteristics of a workpiece, process requirements and a finished product CAD file. At least two of the processing curves are selected and superimposed to form a basic forming curve, wherein each subsection of the basic forming curve corresponds to a selected processing curve. Whether the selected processing curve in each subsection of the basic forming curve matches the optimization target is determined.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 21, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Huang SHIEH, Hsuan-Yu HUANG, Ming-Cheng TSAI, Yi-Ping HUANG
  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Patent number: 11934239
    Abstract: In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng Huang, Yi-Hsing Hsiao, Yu-Jie Huang, Tsung-Tsun Chen, Allen Timothy Chang
  • Publication number: 20240088074
    Abstract: Semiconductor structures and method of forming the same are provided. A semiconductor structure according to the present disclosure includes a metal feature in a dielectric layer, a passivation structure over the dielectric layer and the metal feature, a contact pad over the passivation structure, and a plurality of contact vias extending through the passivation structure and in contact with the metal feature and the contact pad.
    Type: Application
    Filed: March 15, 2023
    Publication date: March 14, 2024
    Inventors: Chia-Feng Cheng, Kang-Yi Lien, Chia-Ping Lai
  • Publication number: 20240086798
    Abstract: A method and system for generating work load predictions by a neural network for staffing scheduling. A database(s) can include neural network training data corresponding to the characteristics of a plurality of past trigger conditions, and a record of the actual work load associated with those past trigger conditions. The neural network can analyze the neural network training data, and, via machine learning, determine and/or refine an ad hoc model that can generate a predicted work load associated with an occurrence of the trigger condition. The predicted work load can be compared to a current staffing schedule that was developed via use of a base model. Based on differences in the predicted work load and current staffing scheduling, as well as rules and constraints regarding reallocation of workers, an updated staffing schedule can be generated, with changes to the staffing schedule being automatically communicated to client devices.
    Type: Application
    Filed: September 9, 2022
    Publication date: March 14, 2024
    Inventors: Yi Cheng, Lance Michael Cunningham, Diana Surtihadi
  • Publication number: 20240088026
    Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 14, 2024
    Inventors: Yi Ching Ong, Wei-Cheng Wu, Chien Hung Liu, Harry-Haklay Chuang, Yu-Sheng Chen, Yu-Jen Wang, Kuo-Ching Huang
  • Publication number: 20240085614
    Abstract: An anti-peep light source module includes a light source module and a viewing angle switching module. The light source module has a light source and a light guide plate (LGP) and has light emitting elements arranged along a first direction. The viewing angle switching module is located on a transmission path of an illumination beam of the light source module and includes a viewing angle limiting element and a viewing angle adjusting element configured to change a viewing angle of the illumination beam. The viewing angle limiting element has a grating structure and is located between the viewing angle adjusting element and the light source module. an included angle between an extension direction of the grating structure and the first direction is within a range from 88 degrees to 92 degrees. The anti-peep light source module and A display device achieve favorable optical performance, user experience, and production yield.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Applicant: Coretronic Corporation
    Inventors: Yi-Cheng Lin, Chih-Hsuan Kuo, Sung-Chun Hsu, Ming-Hsiung Fan, Tzeng-Ke Shiau
  • Publication number: 20240085369
    Abstract: Disclosed is a self-powered formaldehyde sensing device, comprising: a triboelectric material electrode layer including a first substrate and a first electrode layer formed on the first substrate; a triboelectric material dielectric layer including a second substrate, a second electrode layer formed on the second substrate, a dielectric reacting layer formed on the second electrode layer, and a reaction modification layer formed on the dielectric reacting layer to surface-modify the dielectric reacting layer, the reaction modification layer being a phosphomolybdic acid complex (cPMA) layer, the phosphomolybdic acid complex of the phosphomolybdic acid complex layer being obtained by dissolving 4,4?-bipyridine (BPY) in isopropanol (IPA) and then mixing with phosphomolybdic acid (PMA) solution; an elastic spacer; and an external circuit.
    Type: Application
    Filed: December 21, 2022
    Publication date: March 14, 2024
    Applicant: National Taiwan University of Science and Technology
    Inventors: Chih-Yu Chang, Chun-Yi Ho, Yu-Hsuan Cheng, Ying-Ying Chen
  • Patent number: D1018891
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: March 19, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Peng-Hui Wang, Ming-Chieh Cheng, Xiu-Yi Lin