Patents by Inventor Yi Ching Ong

Yi Ching Ong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230268244
    Abstract: An electrocaloric heat dissipation device is formed by inserting metal layer-pyroelectric layer-metal layer (MPM) structures between the metallization layers in a metal interconnect. Electric fields are alternately applied and relaxed to induce temperatures of the pyroelectric layers to cycle and drive heat transfer. The heat dissipation device may be placed adjacent a hot spot in a power management integrated circuit (PMIC) and is particularly useful when the PMIC is in a 3D package. In some embodiments, the MPM structures are inserted around circuit wiring. Interconnects for the heat dissipation device may replace dummy metal wiring.
    Type: Application
    Filed: May 20, 2022
    Publication date: August 24, 2023
    Inventors: Yi Ching Ong, Kuo-Ching Huang, Harry-Hak-Lay Chuang
  • Publication number: 20230011305
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes one or more interconnect wires and vias arranged within one or more interconnect dielectric layers over a substrate. Further, a bottom electrode is disposed over the one or more interconnect wires and vias and comprises a first material having a first work function. A top electrode is disposed over the bottom electrode and comprises a second material having a second work function. The first material is different than the second material, and the first work function is different than the second work function. An anti-ferroelectric layer is disposed between the top and bottom electrodes.
    Type: Application
    Filed: March 9, 2022
    Publication date: January 12, 2023
    Inventors: Kuen-Yi Chen, Yi-Hsuan Chen, Yi Ching Ong, Kuo-Ching Huang
  • Publication number: 20220415883
    Abstract: The present disclosure relates to an integrated chip including a first metal layer over a substrate. A second metal layer is over the first metal layer. An ionic crystal layer is between the first metal layer and the second metal layer. A metal oxide layer is between the first metal layer and the second metal layer. The first metal layer, the second metal layer, the ionic crystal layer, and the metal oxide layer are over a transistor device that is arranged along the substrate.
    Type: Application
    Filed: January 7, 2022
    Publication date: December 29, 2022
    Inventors: Yi Ching Ong, Kuen-Yi Chen, Yi-Hsuan Chen, Kuo-Ching Huang, Harry-Hak-Lay Chuang