Patents by Inventor Yi-Ching Wu

Yi-Ching Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7229896
    Abstract: The present invention discloses an improved shallow trench isolation process. A semiconductor substrate having a pad oxide disposed thereon and a pad nitride disposed directly on the pad oxide is provided. A trench is etched, through the pad oxide and the pad nitride, into the semiconductor substrate. A thermal oxide liner is then grown in the trench. A silicon nitride liner is deposited into the trench, wherein the silicon nitride liner covering the pad nitride and the thermal oxide liner has a first stress status. A stress alteration process is performed to alter the silicon nitride liner from the first stress status to a second stress status. A trench fill dielectric having the second stress status is deposited into the trench.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: June 12, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Te Chen, Yi-Ching Wu, Chien-Tung Huang
  • Publication number: 20070062819
    Abstract: A method for controlling an apparatus to perform a multi-layer chemical mechanical polishing (CMP) process with a polishing rate for a plurality of process runs. For each process run, a multilayered structure with a first thickness formed on a wafer is polished and a second thickness of the multilayered structure is predetermined to be polished away. The method comprises steps of receiving a post-CMP thickness information of the multilayered structure of a first process run, wherein for the first process run, the CMP process is performed for a first CMP process time. Then, a second CMP process time is determined according to the first CMP process time, the first thickness and the post-CMP thickness. Further, the second CMP process time is provided to the apparatus for processing a second process run posterior to the first process run.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 22, 2007
    Inventors: Ming-Hsin Yeh, Cheng-Chuan Lee, Yi-Ching Wu, Chih-Hsiang Hsiao
  • Publication number: 20070062910
    Abstract: A complex CMP process is described. A target film is coarsely polished using a first polishing platen in a first CMP machine. The remaining target film is then fine polished using successively a second polishing platen and a third polishing platen in a second CMP machine that is different from the first CMP machine.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 22, 2007
    Inventors: Ming-Hsin Yeh, Cheng-Chuan Lee, Ming-Te Chen, Yi-Ching Wu, Chin-Hsiang Hsiao
  • Publication number: 20070049042
    Abstract: A wafer is provided and loaded in a reaction chamber. Subsequently, the wafer is lifted up, and a dry clean process is performed on the wafer to clean the front side, the back side, and the bevel of the wafer. Following that, a deposition process is performed on the wafer. The dry clean process and the deposition process are carried out in an in-situ manner.
    Type: Application
    Filed: August 24, 2005
    Publication date: March 1, 2007
    Inventors: Ming-Te Chen, Yi-Ching Wu, Chien-Tung Huang
  • Publication number: 20070032039
    Abstract: The present invention discloses an improved shallow trench isolation process. A semiconductor substrate having a pad oxide disposed thereon and a pad nitride disposed directly on the pad oxide is provided. A trench is etched, through the pad oxide and the pad oxide, into the semiconductor substrate. A thermal oxide liner is then grown in the trench. A silicon nitride liner is deposited into the trench, wherein the silicon nitride liner covering the pad nitride and the thermal oxide liner has a first stress status. A stress alteration process is performed to alter the silicon nitride liner from the first stress status to a second stress status. A trench fill dielectric having the second stress status is deposited into the trench.
    Type: Application
    Filed: August 3, 2005
    Publication date: February 8, 2007
    Inventors: Ming-Te Chen, Yi-Ching Wu, Chien-Tung Huang
  • Publication number: 20060194427
    Abstract: An interconnecting process is described. First, a dielectric layer with a plurality of openings is provided. Then, a metallic layer is formed to fill up the openings. A first dielectric barrier layer is formed to cover the dielectric layer and the metallic layer. Thereafter, a second dielectric barrier layer is formed over the first dielectric barrier layer. The second dielectric barrier layer is used to repair the first dielectric barrier layer and improve the reliability and yield of the process.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 31, 2006
    Inventors: Yi-Ching Wu, Chris Chen, Chih-Hsiang Shiau, Nuno Chen, Leonard Chen
  • Publication number: 20060006545
    Abstract: A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer disposed over the hydrophilic material layer. It is noted that, the edge of the semiconductor structure may be polished after the hydrophilic material layer is formed over the dielectric layer and before the hardmask layer is formed over the hydrophilic material layer.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 12, 2006
    Inventors: Yi-Ching Wu, Jiann-Fu Chen, Chih-Hsiang Shiau
  • Patent number: 6468553
    Abstract: The invention discloses an extract containing puccoon and Chinese angelica, and a formula and preparation method of an ointment containing the extract. The extract is used for treating burns and scalds and is characterized by superior shelf-life. The puccoon and Chinese angelica are extracted with an organic solvent having a polarity of between 0.35 and 0.95, which are then filtrated, concentrated and mixed with a physiologically acceptable carrier or excipient.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: October 22, 2002
    Assignee: Pharmaceutical Industry Technology and Development Center
    Inventors: Ce-Shing Sheu, Yi-Ching Wu, Jun-Hung Kuo