Patents by Inventor Yi Chu

Yi Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240395605
    Abstract: A method of manufacturing a semiconductor memory device, including steps of providing a substrate, forming word lines extending in a first direction in the substrate, forming bit lines extending in a second direction over the word lines, forming partition structures between the bit lines and right above the word lines, forming storage node contacts in spaces defined by the bit lines and the partition structures, wherein a portion of each of the storage node contacts protruding from top surfaces of the bit lines and the partition structures is contact pad, forming a first dielectric layer on the contact pads, the bit lines and the partition structures, forming a second dielectric layer on the first dielectric layer, and performing an etch back process to remove parts of the second dielectric layer, so that only parts of the second dielectric layer on sidewalls of the contact pads remain.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Janbo Zhang, Chao-Wei Lin, Chia-Yi Chu, Yu-Cheng Tung, Ken-Li Chen, Tsung-Wen Chen
  • Publication number: 20240375251
    Abstract: A die bonding system includes a pick-and-placer, a carrier fixing platform and a transfer platform. The pick-and-placer includes a suction head for picking up a die and placing the die on a carrier. The carrier fixing platform is used to fix the carrier. The carrier has a bearing surface arranged to face downward or to be inclined at an angle relative to a horizontal plane. The transfer platform includes a driver, the pick-and-placer is arranged on the transfer platform, and the driver controls the pick-and-placer to move to a location under the carrier or tilt the angle relative to the horizontal plane, and the pick-and-placer bonds the die to the bearing surface of the carrier from a location under the carrier or at the angle of tilt.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chu WU, Jen-Yuan Chang
  • Publication number: 20240379564
    Abstract: A method of forming a semiconductor structure includes forming a first conductive contact in a first dielectric layer coupled to a first device and forming a second conductive contact in the first dielectric layer coupled to a second device. A first trench is formed in the first dielectric layer having a first depth and exposing at least a portion of the first conductive contact. A second trench is formed in the first dielectric layer having a second depth different than the first depth and exposing at least a portion of the second conductive contact. A first conductive layer is formed in the first trench and the second trench. A second dielectric layer is formed in the first trench and the second trench over the first conductive layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 14, 2024
    Inventors: Yi-Chu WU, Jen-Yuan CHANG
  • Publication number: 20240355740
    Abstract: A method includes forming a dielectric layer over a conductive feature, and etching the dielectric layer to form an opening. The conductive feature is exposed through the opening. The method further includes forming a tungsten liner in the opening, wherein the tungsten liner contacts sidewalls of the dielectric layer, depositing a tungsten layer to fill the opening, and planarizing the tungsten layer. Portions of the tungsten layer and the tungsten liner in the opening form a contact plug.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 24, 2024
    Inventors: Feng-Yu Chang, Sheng-Hsuan Lin, Shu-Lan Chang, Kai-Yi Chu, Meng-Hsien Lin, Pei-Hsuan Lee, Pei Shan Chang, Chih-Chien Chi, Chun-I Tsai, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai, Syun-Ming Jang, Wei-Jen Lo
  • Patent number: 12121510
    Abstract: The present invention generally relates to sensitizer compounds and their use to sensitize cancer and/or pre-cancerous cells of certain cancers to treatment with certain resistance-prone therapeutics used in cancer therapy. In embodiments, the conjugates of particular esters or amides of Near Infrared Dyes, are used as sensitizers to avoid or overcome therapeutic resistance once formed. In embodiments, the sensitizers include conjugates with Cisplatin, Simvastatin, Artemisinin, platin-based compounds or statins. In embodiments, the resistance prone cancer therapeutics include cisplatin, gemcitabine, doxorubicin, paclitaxel, docetaxel, and platin-based compounds. These may be administered in combination with the sensitizer, or the sensitizer itself may comprise an therapeutic-derived moiety conjugated to the sensitizer, for example as is the case for dye-CIS conjugated sensitizers. Alternatively, the sensitizer may be co-administered with one or more therapeutic.
    Type: Grant
    Filed: October 21, 2017
    Date of Patent: October 22, 2024
    Assignees: Da Zen Theranostics, Inc., Cedars-Sinai Medical Center
    Inventors: Liyuan Yin, Yi Zhang, Stefan Mrdenovic, Gina Chia Yi Chu, Ruoxiang Wang, Qinghua Zhou, Jian Zhang, Leland W. K. Chung
  • Patent number: 12100617
    Abstract: A method of manufacturing a semiconductor memory device is provided in the present invention, including steps of providing a substrate, forming word lines extending in a first direction in said substrate, forming bit lines extending in a second direction over said word lines, forming partition structures between said bit lines and right above said word lines, forming storage node contacts in spaces defined by said bit lines and said partition structures, wherein a portion of said storage node contact protruding from top surfaces of said bit lines and said partition structures is contact pad, forming a silicon nitride liner on said contact pads, said bit lines and said partition structures, and forming a silicon oxide layer on said silicon nitride liner.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: September 24, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Janbo Zhang, Chao-Wei Lin, Chia-Yi Chu, Yu-Cheng Tung, Ken-Li Chen, Tsung-Wen Chen
  • Publication number: 20240306291
    Abstract: A circuit board and a layout method thereof are provided. The circuit board includes a first metal layer, a second metal layer, and a third metal layer. The first metal layer forms multiple first reference conductive wires. The second metal layer forms at least one signal transmission wire. The third metal layer forms multiple third reference conductive wires. The first metal layer, the second metal layer, and a third metal layer are overlapped with each other, and each of the first reference conductive wires is not completely overlapped with each of the second reference conductive wires.
    Type: Application
    Filed: March 9, 2023
    Publication date: September 12, 2024
    Applicant: HTC Corporation
    Inventors: Che-Jung Chang, Chia-Chu Ho, Huan Yi Chu
  • Patent number: 12069851
    Abstract: A transistor, a memory and a method of forming the same are disclosed. The transistor includes a gate dielectric layer (200) having an upper portion (200b) and a lower portion (200a). The upper portion (200b) is multi-layer structure having an increased thickness without changing a thickness of the lower portion (200a). In this way, gate-induced drain current leakage of the transistor can be mitigated at uncompromised performance thereof. Additionally, the upper portion (200b) designed as multi-layer structure having an increased thickness can facilitate flexible adjustment in parameters of the upper portion (200b). The memory device includes dielectric material layers (DL), which are formed in respective word line trenches and each have an upper portion and a lower portion. In addition, in both trench isolation structures (STI) and active areas (AA), the upper portion of the dielectric material layers (DL) has a thickness greater than a thickness of the lower portion.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 20, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chung-Yen Chou, Chih-Yuan Chen, Qinfu Zhang, Chao-Wei Lin, Chia-Yi Chu, Jen-Chieh Cheng, Jen-Kuo Wu, Huixian Lai
  • Patent number: 12060923
    Abstract: A speed reducer includes an input shaft, an input gear, a fixing gear and an output gear. The input shaft includes an eccentric structure. The input gear is disposed on the eccentric structure and includes first teeth of which each with a first contact portion and a second contact portion. The fixing gear and the output gear are disposed corresponding to the input gear, wherein the fixing gear includes second teeth, and the second teeth are in contact with the first contact portions, wherein the output gear includes third teeth, and the third teeth are in contact with the second contact portions. A first tooth number difference between the first teeth and the second teeth is different from a second tooth number difference between the first teeth and the third teeth.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: August 13, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chi-Wen Chung, En-Yi Chu, Ming-Li Tsao, Hsien-Lung Tsai
  • Publication number: 20240261263
    Abstract: The present invention generally relates to sensitizer compounds and their use in combination with Tyrosine Kinase Inhibitors (TKIs) for sensitizing tumor, cancer or pre-cancerous cells to TKI treatment. In particular, the present invention relates to administration regimes that combine TKIs such as Gefitinib or Icotinib with TKI-sensitizing DZ1 esters and amides conjugated to statin or platin-based drugs, or to Artemisinin, including, without limitation: DZ1-Simvastatin amide, DZ1-Simvastatin ester, DZ1-Cisplatin ester, and DZ1-Cisplatin amide, DZ1-Artemisinin ester, and DZ1-Artemisinin amide. Furthermore, the present invention relates to improved TKI treatment of cancers by sensitizing tumor, cancer or pre-cancerous cells, in particular cancers that develop TKI resistance, including e.g. lung cancer and pancreatic cancer.
    Type: Application
    Filed: December 6, 2023
    Publication date: August 8, 2024
    Inventors: Liyuan Yin, Yi Zhang, Stefan Mrdenovic, Gina Chi-Yi Chu, Ruoxiang Wang, Qinghua Zhou, Jian Zhang, Leland W.K. Chung
  • Publication number: 20240142344
    Abstract: In example implementations described herein, there are systems and methods enabling manufacturers to become more efficient by providing a digital tool to track, visualize, quantify, and notify production bottlenecks for quick actions. Some implementations include an apparatus including a processor configured to analyze time-stamp data collected associated with a plurality of elements of an industrial process. The processor may be configured to generate, based on the analyzed time-stamp data, a color coded visualization of the industrial process, where generating the color coded visualization includes associating each of the plurality of elements of the industrial process with a corresponding color indicating a state of an element in the plurality of elements of the industrial process. The processor may further be configured to present, via a display, the generated color coded visualization of the industrial process.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: Wei YUAN, Yi-chu CHANG, Lili ZHENG
  • Publication number: 20240116172
    Abstract: Aspects of the present disclosure involve systems and methods, which can include, for receipt of a pallet involving a plurality of objects, controlling a robotic arm to depalletize each of the plurality of objects from the pallet according to a position, orientation, and weight of the each of the plurality of objects retrieved from a database.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventor: Yi-chu CHANG
  • Patent number: 11932714
    Abstract: A copolymer, a film composition and a composite material employing the same are provided. The copolymer is a copolymerization product of a composition, wherein the composition includes a monomer (a), a monomer (b) and a monomer (c). The monomer (a) is a compound having a structure represented by Formula (I), the monomer (b) is a compound having a structure represented by Formula (II), and the monomer (c) is a compound having a structure represented by Formula (III) wherein R1, R2, R3, R4, R5 and R6 are as defined in specification.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 19, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Yi Chu, Yun-Ching Lee, Li-Chun Liang, Wei-Ta Yang, Hsiang-Chin Juan
  • Patent number: 11878000
    Abstract: The present invention generally relates to sensitizer compounds and their use in combination with Tyrosine Kinase Inhibitors (TKIs) for sensitizing tumor, cancer or pre-cancerous cells to TKI treatment. In particular, the present invention relates to administration regimes that combine TKIs such as Gefitinib or Icotinib with TKI-sensitizing DZ1 esters and amides conjugated to statin or platin-based drugs, or to Artemisinin, including, without limitation: DZ1-Simvastatin amide, DZ1-Simvastatin ester, DZ1-Cisplatin ester, and DZ1-Cisplatin amide, DZ1-Artemisinin ester, and DZ1-Artemisinin amide. Furthermore, the present invention relates to improved TKI treatment of cancers by sensitizing tumor, cancer or pre-cancerous cells, in particular cancers that develop TKI resistance, including e.g. lung cancer and pancreatic cancer.
    Type: Grant
    Filed: October 21, 2017
    Date of Patent: January 23, 2024
    Assignees: Da Zen Theranostics, Inc., Cedars-Sinai Medical Center
    Inventors: Liyuan Yin, Yi Zhang, Stefan Mrdenovic, Gina Chia Yi Chu, Ruoxiang Wang, Qinghua Zhou, Jian Zhang, Leland W. K. Chung
  • Patent number: 11881142
    Abstract: An image brightness adjusting method, comprising: (a) computing or predicting a first input frame rate according to at least one first input image; (b) generating a first brightness according to a first brightness curve and the first input frame rate, wherein the first brightness curve corresponds to a first frame rate; (c) generating a second brightness according to a second brightness curve and the first input frame rate, wherein the second brightness curve corresponds to a second frame rate; (d) generating a first brightness compensating curve according to the first input frame rate and a brightness difference between the first brightness and the second brightness; and (e) setting a first compensating brightness of at least one second input image according to the first brightness compensating curve.
    Type: Grant
    Filed: June 6, 2023
    Date of Patent: January 23, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chu Li, Chun-Hsing Hsieh, Yi-Lin Tsai
  • Patent number: 11817384
    Abstract: The present disclosure provides an interconnect structure and a method for forming an interconnect structure. The method for forming an interconnect structure includes forming a bottom metal line in a first interlayer dielectric layer, forming a second interlayer dielectric layer over the bottom metal line, exposing a top surface of the bottom metal line, increasing a total surface area of the exposed top surface of the bottom metal line, forming a conductive via over the bottom metal line, and forming a top metal line over the conductive via.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shuen-Shin Liang, Ken-Yu Chang, Hung-Yi Huang, Chien Chang, Chi-Hung Chuang, Kai-Yi Chu, Chun-I Tsai, Chun-Hsien Huang, Chih-Wei Chang, Hsu-Kai Chang, Chia-Hung Chu, Keng-Chu Lin, Sung-Li Wang
  • Patent number: 11800274
    Abstract: An earphone with a circuit board module includes a casing, a speaker, and a circuit board module. The casing includes a back cover and has an accommodation space inside. The speaker is disposed in the accommodation space, and a first chamber is defined between the speaker and the back cover. The circuit board module is disposed in the first chamber and includes a first circuit board having a first surface, a second circuit board having a second surface, and a first flexible connector. The first surface faces and is spaced apart from the second surface of the second circuit board. The first flexible connector includes a first end connected to the first circuit board, a second end which is opposite to the first end and connected to the second circuit board, and a connection segment which connects the first and second ends and is shaped as a letter U.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: October 24, 2023
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventor: Keng-Yi Chu
  • Patent number: 11755003
    Abstract: Example implementations described herein involve systems and methods for operation of a robot configured to work on a first process and a second process, which can involve receiving sensor data indicative of a status of one or more of the first process and the second process; for the status indicative of the first process waiting on the robot, controlling the robot to work on the first process; and for the status indicative of the first process not waiting on the robot, controlling the robot to conduct one or more of work on the second process or return to standby.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: September 12, 2023
    Assignee: HITACHI, LTD.
    Inventors: Yi-Chu Chang, Heming Chen
  • Patent number: 11754888
    Abstract: A display panel includes a first substrate, a second substrate, a liquid crystal layer, a pixel electrode, a common electrode, a first polarizer and a second polarizer. The pixel electrode includes a trunk portion, first to fourth branch portions, and first to fourth strip portions. The trunk portion extends along a first direction. The first and second branch portions are connected to a first end of the trunk portion. The third and fourth branch portions are connected to a second end of the trunk portion. The first strip portions are connected to the first and second branch portions. The second strip portions are connected to the third and fourth branch portions. The third strip portions are connected to the first and third branch portions and the trunk portion. The fourth strip portions are connected to the second and fourth branch portions and the trunk portion.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: September 12, 2023
    Assignee: Au Optronics Corporation
    Inventors: Tzu-Wei Kuo, Yi-Chu Wang, Hung-Che Lin, Shun-Ling Hou, Sheng-Ju Ho, Chian-Wen Hsu
  • Patent number: D1020770
    Type: Grant
    Filed: September 19, 2023
    Date of Patent: April 2, 2024
    Assignee: EASTERN GLOBAL CORPORATION
    Inventor: Jui-Yi Chu