Patents by Inventor Yi-Chun Chang

Yi-Chun Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230361185
    Abstract: A device comprises a source/drain contact over a source/drain region of a transistor, an etch stop layer above the source/drain contact, an interlayer dielectric (ILD) layer above the etch stop layer, and a source/drain via extending through the ILD layer and the etch stop layer to the source/drain contact. The etch stop layer has an oxidized region in contact with the source/drain via and separated from the source/drain contact.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Huan-Just LIN, Jyun-De WU
  • Patent number: 11810919
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. The first conductive via structure has a first substantially strip shape in a top view of the first conductive via structure.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De Wu, Te-Chih Hsiung, Yi-Chun Chang, Yi-Chen Wang, Yuan-Tien Tu, Peng Wang, Huan-Just Lin
  • Publication number: 20230298934
    Abstract: A semiconductor device includes a gate structure, source/drain regions, source/drain contacts, a gate dielectric cap, an etch stop layer, and a gate contact. The gate structure is over a substrate. The source/drain regions are at opposite sides of the gate structure. The source/drain contacts are over the source/drain regions, respectively. The gate dielectric cap is over the gate structure and has opposite sidewalls interfacing the source/drain contacts.
    Type: Application
    Filed: April 20, 2023
    Publication date: September 21, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Te-Chih HSIUNG, Yi-Chun CHANG, Jyun-De WU, Yi-Chen WANG, Yuan-Tien TU, Huan-Just LIN
  • Patent number: 11749732
    Abstract: A method comprises forming a source/drain contact over a source/drain region; forming an etch stop layer over the source/drain contact and an interlayer dielectric (ILD) layer over the etch stop layer; performing a first etching process to form a via opening extending through the ILD layer and a recess in the etch stop layer; oxidizing a sidewall of the recess in the etch stop layer; after oxidizing the sidewall of the recess in the etch stop layer, performing a second etching process to extend the via opening down to the source/drain contact; and after performing the second etching process, forming a source/drain via in the via opening.
    Type: Grant
    Filed: February 6, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih Hsiung, Yi-Chun Chang, Yi-Chen Wang, Yuan-Tien Tu, Huan-Just Lin, Jyun-De Wu
  • Patent number: 11664272
    Abstract: A method comprises forming a gate structure over a semiconductor substrate; forming an etch stop layer over the gate structure and an ILD layer over the etch stop layer; performing a first etching process to form a gate contact opening extending through the ILD layer into the etch stop layer, resulting in a sidewall of the etch stop layer being exposed in the gate contact opening; oxidizing the exposed sidewall of the etch stop layer; after oxidizing the exposed sidewall of the etch stop layer, performing a second etching process to deepen the gate contact opening; and forming a gate contact in the deepened gate contact opening.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Te-Chih Hsiung, Yi-Chun Chang, Jyun-De Wu, Yi-Chen Wang, Yuan-Tien Tu, Huan-Just Lin
  • Publication number: 20230033570
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a metal gate stack over a substrate and an epitaxial structure over the substrate. The semiconductor device structure also includes a conductive contact electrically connected to the epitaxial structure. A topmost surface of the metal gate stack is vertically disposed between a topmost surface of the conductive contact and a bottommost surface of the conductive contact. The semiconductor device structure further includes a first conductive via electrically connected to the metal gate stack. The topmost surface of the conductive contact is vertically disposed between a topmost surface of the first conductive via and a bottommost surface of the first conductive via. In addition, the semiconductor device structure includes a second conductive via electrically connected to the conductive contact.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chieh WU, Pang-Chi Wu, Wang-Jung Hsueh, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Patent number: 11566422
    Abstract: Disclosed herein is a building assembly for assembling building panels. The building assembly includes a supporting member, a pair of a first sealing member, an elastically deformable gasket, and a second sealing member. The supporting member has a base, a channel disposed at the center of the base, and a pair of rails independently disposed next to the channel. The pair of a first sealing members independently includes a first base portion and two retention tongues independently extending outwardly from the first base portion. The elastically deformable gasket has a U- or V-shaped space in cross section and two flanges independently extending laterally from one edge of the U- or V-shaped space. The second sealing member has a second base portion and a rib disposed at the center of the second base portion.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: January 31, 2023
    Assignee: MINIWIZ CO., LTD.
    Inventors: Chian-Chi Huang, Tzu-Wei Liu, Jui-Ping Chen, Yu-Ying Yai, Yu-Tung Hsing, Pei-Yi Huang, Min-Wei Lin, Yi-Chun Chang, Ling-Hsiang Weng
  • Publication number: 20220406653
    Abstract: A method includes forming a conductive feature through a first dielectric layer, sequentially forming a second dielectric layer and a third dielectric layer over the first dielectric layer, and etching the third dielectric layer to form an opening. A first width of the opening at a top surface of the third dielectric layer is greater than a second width of the opening at a first interface between the third dielectric layer and the second dielectric layer. The method also includes etching the second dielectric layer until the opening extends to the conductive feature, thereby forming an enlarged opening, and forming a metal material in the enlarged opening. A third width of the enlarged opening at the first interface is equal to or less than a fourth width of the enlarged opening at a second interface between the second dielectric layer and the first dielectric layer.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Chih HSIUNG, Jyun-De WU, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU
  • Publication number: 20220406777
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. The first conductive via structure has a first substantially strip shape in a top view of the first conductive via structure.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De WU, Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Peng WANG, Huan-Just LIN
  • Publication number: 20220359684
    Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
    Type: Application
    Filed: September 3, 2021
    Publication date: November 10, 2022
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20220359287
    Abstract: Embodiments include a contact structure and method of forming the same where the contact structure is deliberately positioned near the end of a metallic line. An opening is formed in an insulating structure positioned over the metallic line and then the opening is extended into the metallic line by an etching process. In the etching process, the line end forces etchant to concentrate back away from the line end, causing lateral etching of the extended opening. A subsequent contact is formed in the opening and enlarged opening.
    Type: Application
    Filed: September 2, 2021
    Publication date: November 10, 2022
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20220352338
    Abstract: Improved conductive contacts, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a first interlayer dielectric (ILD) layer over a transistor structure; a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, a top surface of the first contact being convex, and the top surface of the first contact being disposed below a top surface of the first ILD layer; a second ILD layer over the first ILD layer and the first contact; and a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact.
    Type: Application
    Filed: June 18, 2021
    Publication date: November 3, 2022
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20220310814
    Abstract: A method includes removing a dummy gate stack to form a first trench between gate spacers, forming a replacement gate stack in the first trench, recessing the replacement gate stack to form a second trench between the gate spacers, selectively depositing a conductive capping layer in the second trench, forming a dielectric hard mask in the second trench and over the conductive capping layer, and etching the dielectric hard mask using an etching gas to form an opening in the dielectric hard mask. The replacement gate stack is revealed to the opening. The conductive capping layer is more resistant to the etching gas than the replacement gate stack. The method further comprises forming a gate contact plug over and contacting the conductive capping layer.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 29, 2022
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20220251831
    Abstract: Disclosed herein is a building assembly for assembling building panels. The building assembly includes a supporting member, a pair of a first sealing member, an elastically deformable gasket, and a second sealing member. The supporting member has a base, a channel disposed at the center of the base, and a pair of rails independently disposed next to the channel. The pair of a first sealing members independently includes a first base portion and two retention tongues independently extending outwardly from the first base portion. The elastically deformable gasket has a U- or V-shaped space in cross section and two flanges independently extending laterally from one edge of the U- or V-shaped space. The second sealing member has a second base portion and a rib disposed at the center of the second base portion.
    Type: Application
    Filed: February 9, 2021
    Publication date: August 11, 2022
    Applicant: MINIWIZ CO.,LTD.
    Inventors: Chian-Chi HUANG, Tzu-Wei LIU, Jui-Ping CHEN, Yu-Ying YAI, Yu-Tung HSING, Pei-Yi HUANG, Min-Wei LIN, Yi-Chun CHANG, Ling-Hsiang WENG
  • Publication number: 20220102202
    Abstract: A method comprises forming a gate structure over a semiconductor substrate; forming an etch stop layer over the gate structure and an ILD layer over the etch stop layer; performing a first etching process to form a gate contact opening extending through the ILD layer into the etch stop layer, resulting in a sidewall of the etch stop layer being exposed in the gate contact opening; oxidizing the exposed sidewall of the etch stop layer; after oxidizing the exposed sidewall of the etch stop layer, performing a second etching process to deepen the gate contact opening; and forming a gate contact in the deepened gate contact opening.
    Type: Application
    Filed: February 22, 2021
    Publication date: March 31, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Te-Chih HSIUNG, Yi-Chun CHANG, Jyun-De WU, Yi-Chen WANG, Yuan-Tien TU, Huan-Just LIN
  • Publication number: 20220102511
    Abstract: A method comprises forming a source/drain contact over a source/drain region; forming an etch stop layer over the source/drain contact and an interlayer dielectric (ILD) layer over the etch stop layer; performing a first etching process to form a via opening extending though the ILD layer and a recess in the etch stop layer; oxidizing a sidewall of the recess in the etch stop layer; after oxidizing the sidewall of the recess in the etch stop layer, performing a second etching process to extend the via opening down to the source/drain contact; and after performing the second etching process, forming a source/drain via in the via opening.
    Type: Application
    Filed: February 6, 2021
    Publication date: March 31, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Huan-Just LIN, Jyun-De WU
  • Publication number: 20210108341
    Abstract: Disclosed herein are fabrics having different thermo-properties. The fabric is characterized in its structure by having a high melting temperature zone and a low melting temperature zone, which are respectively made up by yarns having high and low melting temperatures By having yarns of high and low temperatures in the fabric, in which the respective melting temperatures in the high and low melting temperature zones differ by about 30° C. to 150° C.; and the low melting temperature zone melts and eventually becomes harden after heat-activation, while the high melting temperature zone remains un-melted and soft after heat-activation.
    Type: Application
    Filed: March 29, 2018
    Publication date: April 15, 2021
    Applicant: MINIWIZ CO.,LTD.
    Inventors: Chian-Chi HUANG, Tzu-Wei LIU, Yi-Chun CHANG, Ling-Hsiang WENG, GUILLEMETTE-PAULINE-MARION LEGRAND, CAMILLE-JEANNE TEXIER
  • Patent number: 10384373
    Abstract: Disclosed herein is a mobile plastic recycling system mounted in a vehicle. The system is configured to process a plastic article and make it into thermoplastic items. The mobile plastic recycling system includes a plastic recycling apparatus and a power supply apparatus that are electrically coupled with each other; the system also includes a vehicle configured to carry and transport the power supply apparatus and plastic recycling apparatus.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: August 20, 2019
    Assignee: MINIWIZ CO., LTD.
    Inventors: Kong-Sang Jackie Chan, Chian-Chi Huang, Tzu-Wei Liu, Ya-Ting Chang, Tian-Jia Hsieh, Yi-Chun Chang, Chia-Chun Hsieh, Enzo-Louis Muttini
  • Publication number: 20190016087
    Abstract: Disclosed herein are composite laminated articles and methods for manufacturing the same. According to some embodiments, the composite laminated article includes a polyethylene terephthalate (PET) fiber fabric layer, a PET nonwoven laminated board, and a PET film interposed between the PET fiber fabric layer and the PET nonwoven laminated board. In some embodiments, the composite laminated article further includes a low-density PET nonwoven fabric layer interposed between the PET film and the PET nonwoven laminated board. According to embodiments of the present disclosure, the composite laminated article is free of any thermoset binder, and hence, the composite laminated article is one hundred percent recyclable.
    Type: Application
    Filed: July 14, 2017
    Publication date: January 17, 2019
    Applicant: MINIWIZ CO.,LTD.
    Inventors: Chian-Chi HUANG, Tzu-Wei LIU, Yu-Hung TARN, Yi-Chun CHANG, GUILLEMETTE-PAULINE-MARION LEGRAND, CAMILLE-JEANNE TEXIER, JOHANN JOSEPH ALEXEJ BOEDECKER
  • Publication number: 20180290340
    Abstract: Disclosed herein is a mobile plastic recycling system mounted in a vehicle. The system is configured to process a plastic article and make it into thermoplastic items. The mobile plastic recycling system includes a plastic recycling apparatus and a power supply apparatus that are electrically coupled with each other; the system also includes a vehicle configured to carry and transport the power supply apparatus and plastic recycling apparatus.
    Type: Application
    Filed: April 6, 2017
    Publication date: October 11, 2018
    Applicant: MINIWIZ CO.,LTD.
    Inventors: Kong-Sang Jackie CHAN, Chian-Chi HUANG, Tzu-Wei LIU, Ya-Ting CHANG, Tian-Jia HSIEH, Yi-Chun CHANG, Chia-Chun HSIEH, Enzo-Louis MUTTINI