Patents by Inventor Yi Fang
Yi Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12271533Abstract: Changing a lighting mode for a human interface device is described herein. A first lighting mode can be initiated for a human interface device. Keys on the human interface device can be selected over a period of time at a frequency that is within a defined range. A second lighting mode for the human interface device can be identified based in part on the frequency being within the defined range. The first lighting mode and the second lighting mode can define a lighting scheme for light sources in the human interface device that reflect a user mood. The first lighting mode can be switched to the second lighting mode.Type: GrantFiled: July 26, 2019Date of Patent: April 8, 2025Assignee: Hewlett-Packard Development Company, L.P.Inventors: Shun-Tai Yang, Yu-Wei Chiu, Tsung-Yi Lin, Tony Wu, Yi-Wen Fang
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Publication number: 20250106961Abstract: According to an embodiment of the invention, a backlight driver of driving a light-emitting diode (LED) string via a driving transistor in a load path is provided. The LED string, the driving transistor, and an electrical load are coupled to form the load path. The backlight driver includes a current regulator and a headroom detection circuit. The current regulator is coupled to the driving transistor and the first terminal of the electrical load to control a driving current flowing through the load path according to at least a feedback voltage from a first terminal of the electrical load. The headroom detection circuit is coupled to the first terminal of the electrical load and a voltage regulator to control the voltage regulator to regulate a supply voltage to a first terminal of the LED string according to at least the feedback voltage.Type: ApplicationFiled: September 22, 2023Publication date: March 27, 2025Applicant: NOVATEK Microelectronics Corp.Inventors: Jhih-Siou Cheng, Keko-Chun Liang, Chun-Fu Lin, Jin-Yi Lin, Chieh-An Lin, Po-Hsiang Fang
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Publication number: 20250103553Abstract: A data migration method and a related apparatus are provided. An example migration scheduling apparatus determines a migration task of migrating data of a first file from a source device to a destination device, and performs a first change on metadata of the first file, to trigger the source device or the destination device to complete the migration task based on the first change performed on the metadata of the first file.Type: ApplicationFiled: December 11, 2024Publication date: March 27, 2025Inventors: Yi SU, Longwen LAN, Wen ZHOU, Zhen CHENG, Wei FANG, Gang HU, Yaowen XIAO
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Publication number: 20250102316Abstract: The present invention discloses an urban traffic velocity estimation method based on multi-source crowd sensing data. This method, based on roadside pedestrian data and road navigation data collected by smart phones, obtains a final estimated velocity through the steps of missing data filling, self-view velocity aggregation and multi-view velocity fusion. This fine-grained large-scale urban traffic velocity estimation method can achieve velocity estimation on all types of roads, including suburban road sections and paths, instead of just focusing on main roads in a city center. According to the present invention, based on data driving, the urban traffic velocity estimation method does not need to install additional devices on roads, and is low in cost and high in universality. Compared with the prior art, the urban traffic velocity estimation method has higher practicability, theoretical property and applicability, and is of great significance for improving traffic management and planning.Type: ApplicationFiled: May 11, 2023Publication date: March 27, 2025Applicant: ZHEJIANG UNIVERSITYInventors: Chao LI, Yingqian ZHANG, Shibo HE, Jiming CHEN, Yi FANG, Qinmin YANG, Peng CHENG
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Publication number: 20250102568Abstract: A test system and method of testing are provided. In some embodiments, a system for testing an integrated circuit package includes a device tester. The device tester includes a socket, a cylinder head unit engageable with the socket, and a pressure regulator. The socket includes a first pressure cylinder configured to engage a first region of the integrated circuit package and a second pressure cylinder configured to engage a second region of the integrated circuit package. The pressure regulator is configured to provide at gas at a first pressure to the first pressure cylinder and to provide the gas at a second pressure different than the first pressure to the second pressure cylinder.Type: ApplicationFiled: September 25, 2023Publication date: March 27, 2025Inventors: Ting-Yu CHIU, Yi-Neng Chang, Shin-Han You, Chien Fang Huang
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Publication number: 20250100729Abstract: A contact lens product, a packaging case thereof, and a detection method for the same are provided. The packaging case (1) includes an accommodating slot body (11) and a sheet body (12) connected to the accommodating slot body (11). The accommodating slot body (11) has a plurality of optical microstructures (11c) formed on an inner surface (11b) thereof. Each of the optical microstructures (11c) has a height-to-width ratio being within a range from 0.01 to 0.1, whereby the accommodating slot body (11) has a first transparency. The accommodating slot body (11) is configured to allow at least part of the optical microstructures (11c) to be in contact with a preservation liquid (4) for enabling a part of the accommodating slot body (11) corresponding in position thereto to have a second transparency that is greater than the first transparency.Type: ApplicationFiled: June 17, 2022Publication date: March 27, 2025Inventors: YI-FANG HUANG, PO-CHUN CHEN
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Patent number: 12260350Abstract: The invention provides a method for constructing a target prediction model in a multicenter small sample scenario and a prediction method. In combination with the idea of transfer learning, a training set of a new node is predicted by directly using knowledge of a trained node, and a prediction error sample is used to reflect a difference between the new node and the trained node. The difference is used as supplementary knowledge. Model knowledge of the new node is quickly acquired, to avoid training of a new node from scratch each time. Finally, parallel integration of incremental subclassifiers is implemented by using a ridge regression method, so that the deployment time and costs are greatly reduced. The generalization of models is ensured through sharing of historical knowledge and a knowledge discarding mechanism, good classification effect can also be achieved for a node with a small sample size.Type: GrantFiled: January 13, 2024Date of Patent: March 25, 2025Assignee: JIANGNAN UNIVERSITYInventors: Pengjiang Qian, Zhihuang Wang, Shitong Wang, Yizhang Jiang, Wei Fang, Chao Fan, Jian Yao, Xin Zhang, Aiguo Chen, Yi Gu
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Patent number: 12261136Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a plurality of gate conductive patterns on the substrate; an interlayer dielectric layer covering the gate conductive patterns on the substrate; an interconnect structure comprising a contact plug and a first contact pad, the contact plug extending through the interlayer dielectric layer to the substrate, the first contact pad fully covering a top of the contact plug and extending laterally over part of a top surface of the interlayer dielectric layer; and a second contact pad formed on the top surface of the interlayer dielectric layer and spaced apart from a side edge of the first contact pad, wherein the second contact pad is formed and fully overlays on the interlayer dielectric layer and an isolation plug is spaced apart from the first contact pad.Type: GrantFiled: March 12, 2024Date of Patent: March 25, 2025Assignee: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.Inventors: Yi-Wang Jhan, Yung-Tai Huang, Xin You, Xiaopei Fang, Yu-Cheng Tung
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Patent number: 12253707Abstract: A backlight module includes a light guide element including first optical microstructures and second optical microstructures. An angle value of an angle of the first optical microstructures is V1. When the second optical microstructures are respectively recessed into or protrude from a bottom surface, a projection of each sub-optical microstructure on a reference plane has a peak point closest or to farthest from a light emitting surface and a first valley point and a second valley point farthest from or closest to the light emitting surface, a height difference between the peak point and the first valley point or the second valley point is ?H, a length difference between the peak point and the first valley point or the second valley point is ?L, and tan?1(?H/?L) is V2, where V2>0 and V2?0.5·V1.Type: GrantFiled: March 13, 2023Date of Patent: March 18, 2025Assignee: Coretronic CorporationInventors: Ying-Hsiang Chen, Cheng-Yi Tseng, Chung-Yang Fang, Ping-Yen Chen
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Publication number: 20250089340Abstract: A semiconductor device and the method of forming the same are provided. The semiconductor device may comprise a first plurality of nanostructures, a second plurality of nanostructures over a substrate, a first gate stack extending between the nanostructures of the first plurality of nanostructures, a second gate stack extending between the nanostructures of the second plurality of nanostructures, a first source/drain region in contact with a first nanostructure of the first plurality of nanostructures, a second source/drain region in contact with a first nanostructure of the second plurality of nanostructures, wherein the second source/drain region may be separated from the first source/drain region, a silicide layer between the first source/drain region and the second source/drain region, and an isolation layer between the silicide layer and the substrate.Type: ApplicationFiled: January 10, 2024Publication date: March 13, 2025Inventors: Jet-Rung Chang, Ming-Hua Yu, Yi-Fang Pai
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Publication number: 20250087543Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die having a first substrate and a first through via extending through the first substrate, a first gap-fill layer along a sidewall of the first substrate, an isolation layer on a surface of the first substrate and a surface of the first gap-fill layer, a first bonding layer over the isolation layer, and a first bonding pad in the first bonding layer. The isolation layer may overlap an interface between the sidewall of the first substrate and a sidewall of the first gap-fill layer, and may extend on sidewalls of the first through via.Type: ApplicationFiled: January 2, 2024Publication date: March 13, 2025Inventors: Yi-Hsiu Chen, Chia-Fang Tsai, Ming-Yun Liao, Yu-Chian Chiang
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Publication number: 20250087580Abstract: A method of forming a three dimensional integrated circuit (3DIC) structure includes forming a first inter-layer via which connects at a location of a first device layer, wherein the first inter-layer via has a footprint that is at least one factor of ten smaller than a footprint of a first circuit region. The method further includes forming a first conductive segment in a second device layer, different from the first device layer, wherein the first conductive segment electrically connects to the first inter-layer via.Type: ApplicationFiled: November 21, 2024Publication date: March 13, 2025Inventors: Yi-Lin CHUANG, Ching-Fang CHEN, Jia-Jye SHEN
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Publication number: 20250082666Abstract: A drug for the prevention or treatment of sepsis is provided. The drug comprises an exosome containing a circRNA MOTOR, and a nucleotide sequence corresponding to the circRNA MOTOR is shown in SEQ ID NO: 1.Type: ApplicationFiled: November 21, 2024Publication date: March 13, 2025Applicant: SOUTHEAST UNIVERSITYInventors: Wei HUANG, Haibo QIU, Ke FANG, Jianfeng XIE, Ling LIU, Yi YANG, Ran YANG
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Patent number: 12248637Abstract: The present invention discloses a method for outputting a command by detecting a movement of an object, which includes the following steps. First, an image capturing device captures images generated by the movement of the object at different timings by. Next, a motion trajectory is calculated according to the plurality of images. Further next, a corresponding command is outputted according to the motion trajectory. The present invention also provides a system which employs the above-mentioned method.Type: GrantFiled: June 28, 2022Date of Patent: March 11, 2025Assignee: PIXART IMAGING INCORPORATIONInventors: Yu-Hao Huang, Yi-Fang Lee, Ming-Tsan Kao, Nien-Tse Chen
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Publication number: 20250081535Abstract: Systems, methods and apparatus are provided for transistors having a channel region comprising a crystalline spinel indium-gallium-zinc-oxide (IGZO) material.Type: ApplicationFiled: July 25, 2024Publication date: March 6, 2025Inventors: Adharsh Rajagopal, Scott E. Sills, Yi Fang Lee, Glen H. Walters, Alexandre Marc Subirats, Yuanzhi Ma
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Patent number: 12241929Abstract: An exemplary work press assembly for a test handler includes a presser and a guide frame. The presser is configured to secure a device under test (DUT) and press the DUT into a socket for testing. The guide frame is configured to receive guide pins of the socket. The presser extends through an opening of the guide frame, and the guide frame is sandwiched between a first presser portion and a second presser portion. The presser is formed of a first material having a first coefficient of thermal expansion (CTE), and the guide frame is formed from a second material having a second CTE that is less than the first CTE. In some embodiments, a thermal insulation layer(s) separates the presser from the guide frame. In some embodiments, a spacing between sidewalls of the presser and sidewalls of the guide frame is configured to accommodate thermal expansion of the presser.Type: GrantFiled: April 21, 2023Date of Patent: March 4, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Neng Chang, Ting-Yu Chiu, Chien Fang Huang, Shin-Han You
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Publication number: 20250066763Abstract: The present disclosure relates, according to some embodiments, to methods for preparing a library for sequencing. For example, a method may comprise (a) in a coupled reaction, (i) contacting a population of nucleic acid fragments with a tailing enzyme to produce tailed fragments, and (ii) ligating to the tailed fragments a sequencing adapter with a ligase to produce adapter-tagged fragments; and/or separating adapter-tagged fragments from the tailing enzyme and the ligase to produce separated adapter-tagged fragments and, optionally, separated tailing enzyme and/or separated ligase. In some embodiments, a tailing enzyme and/or a ligase used in library preparation may be immobilized enzymes.Type: ApplicationFiled: October 22, 2024Publication date: February 27, 2025Applicant: New England Biolabs, Inc.Inventors: Ming-Qun Xu, Yi Fang, Aihua Zhang, Luo Sun
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Patent number: 12236194Abstract: A method of this disclosure may include performing a named entity recognition on text information related to requirements for a wireframe by a first artificial intelligence (AI) model, so as to extract entities and relations of the entities from the text information. The method may further comprise inputting the extracted entities and relations to a second AI model to generate the wireframe, wherein the second AI model is trained so that a difference between resultant relations of the entities of the generated wireframe and the extracted relations of the entities from the first AI model is decreased.Type: GrantFiled: October 20, 2022Date of Patent: February 25, 2025Assignee: International Business Machines CorporationInventors: Zhaoqi Wu, Yi Fang Chen, Zhi Wang, Yi Qun Zhang, Yan Du, Li Na Yuan
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Patent number: D1063590Type: GrantFiled: July 21, 2022Date of Patent: February 25, 2025Assignee: TONG LUNG METAL INDUSTRY CO., LTD.Inventors: Mei-Ching Chu, Chun-Yi Fang, Pai-Hsiang Chuang, Chen-Ming Lin, Yu Lin, Ruei-Jie Jeng, Ding-Sian Cai
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Patent number: D1063925Type: GrantFiled: January 21, 2021Date of Patent: February 25, 2025Assignee: COMPAL ELECTRONICS, INC.Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang, Sheng-Hung Lee