Abstract: This document describes techniques and systems related to a radar system using a machine-learned model to identify the number of objects within each range-Doppler bin. For example, the radar system includes a processor that obtains radar data associated with objects and processes the radar data to generate beam vectors. The processor then uses a machine-learned model to identify the number of objects within each range-Doppler bin using extracted features (e.g., magnitude variation, signal-to-noise ratio, subarray beam vector correlations) of the beam vectors. The processor selects a particular angle-finding technique based on whether a single object or multiple objects are identified. In this way, the described systems and techniques more accurately identify the number of object in each range-Doppler bin, thus improving the computational efficiency and robustness of subsequent angle finding.

Abstract: The invention provides a semiconductor structure, which comprises a first substrate and a second substrate stacked with each other. A first passive element is located in the first substrate and a second passive element is located in the second substrate. A first wire layer is located on a top surface of the first substrate and electrically connected with the first passive element, and a conductive pad is located on a bottom surface of the second substrate and directly contacts the first wire layer.

Abstract: A semiconductor device is provided, including a first well of a first conductivity type disposed on a substrate, a second well of a second conductivity type, different from the conductivity type, surrounding the first well in a layout view, a third well of the first conductivity type, in which a portion of the second well is interposed between the first well and the third well, a first doped region of the second conductivity type that is in the first well and coupled to an input/output (I/O) pad; and at least one second doped region of the first conductivity type that is in the third well and coupled to a first supply voltage terminal. The first doped region, the at least one second doped region, the first well and the third well discharge a first electrostatic discharge (ESD) current between the I/O pad and the first voltage terminal.

Abstract: A device includes a first 2D semiconductor layer over a substrate, a first source/drain contact interfacing a first region of the first 2D semiconductor layer, and a second source/drain contact interfacing a second region of the first 2D semiconductor layer spaced apart from the first region of the first 2D semiconductor layer. The first source/drain contact includes an antimony layer interfacing the first region of the first 2D semiconductor layer, and a platinum layer over the antimony layer.

Abstract: A self-driving takeover determining method is for determining whether a driver located on a driver's seat in a vehicle satisfies a self-driving takeover condition in a self-driving mode. The self-driving takeover determining method includes a driver calibrating step, a detection module updating step, an image capturing step, a face detecting step, a driver availability determining step and a self-driving takeover determining step. The driver calibrating step includes, before entering the self-driving mode of the vehicle, capturing a plurality of calibration images of the driver by at least one camera and generating a plurality of driver calibration parameters by a calibration module according to the calibration images, and the driver calibration parameters are a plurality of relative position parameters of the driver in a cockpit of the vehicle. The detection module updating step includes updating a detection module according to the driver calibration parameters.

Abstract: An integrated circuit (IC) may include a plurality of functional blocks, and each functional block of the plurality of functional blocks may include hardware circuits, wherein the plurality of functional blocks may include a first functional block. In addition, the first functional block may include a first macro circuit that is positioned within a first sub-region of the first functional block, wherein among multiple sides of the first sub-region, a first side of the first sub-region is closest to a boundary of the first functional block. Additionally, a first intermediate sub-region of the first functional block is positioned between the first side of the first sub-region and the boundary of the first functional block, and there is no tap cell in the first intermediate sub-region of the first functional block.

Abstract: Disclosed herein are a block copolymer of polyalkylene oxide and polyvinyl ester, and its use in a fabric or home care product as anti-greying agent. Further disclosed herein is a detergent composition including the block copolymer.

Abstract: A resonant converter switching between different operational state modes is provided. The resonant converter includes a first transistor, a second transistor, a control circuit, a resonant circuit, a transformer and an output stage circuit. A first terminal of the first transistor and a second terminal of the second transistor are connected to positive and negative terminals of an input voltage source, respectively. A first terminal of the second transistor is connected to a second terminal of the first transistor. The resonant circuit is connected to the second terminal of the first transistor and the transformer. The transformer is connected to a load through the output stage circuit. The control circuit modulates frequencies or duty cycles of conduction time control signals that are outputted to the first and second transistors to different values for switching the resonant converter between the operational state modes.

Abstract: A resonant converter having a switch on-time control mechanism is provided. The resonant converter includes a primary-side switch circuit, a primary-side resonant circuit, a secondary-side switch circuit, a secondary-side resonant circuit, a transformer and a control circuit. In the resonant converter, the control circuit controls on-times and switching frequencies of the primary-side switch circuit and the secondary-side switch circuit to extend time within which power is transmitted from an input power source, the primary-side switch circuit, the primary-side resonant circuit and the transformer to the secondary-side resonant circuit, and stored in the secondary-side resonant circuit. As a result, the secondary-side resonant circuit is able to supply more power to a load.

Abstract: A method for producing an outer shell includes steps of a) stacking a second plate on a first plate, the second plate having an accommodation space that is recessed toward the first plate; b) disposing a filling material in the accommodation space; c) stacking a third plate on the second plate so as to cover the filling material and to form a composite structure; and d) stamping the composite structure such that a peripheral portion of the composite structure is bent, thereby forming an outer shell. In step b), a weight of the filling material is lower than that of the first plate, that of the second plate, and that of the third plate, or rigidity of the filling material is higher than that of the first plate, that of the second plate, and that of the third plate.

Abstract: The present invention discloses a diaphragm for a speaker including a lower surface area, a central area formed on said lower surface area, an upper surface area formed on said central area. The upper surface area, the central area and the lower surface area includes homogeneous amorphous materials. The diaphragm includes internal stress changing with a depth from the surface to the center of the diaphragm.

Abstract: A time synchronization method is provided for a time synchronization device, wherein the time synchronization device runs a plurality of precision time protocol (PTP) instances to connect to a plurality of time synchronization domains respectively. The time synchronization method includes determining whether a frequency of a local PTP clock of the time synchronization device is changed; and updating a frequency of a local clock of the time synchronization device with the frequency of the local PTP clock in response to the frequency of the local PTP clock being changed.

Abstract: A time synchronization method used for a time synchronization device is provided. The time synchronization device runs a plurality of Precision Time Protocol (PTP) instances to connect to a plurality of time synchronization domains through a plurality of ports. The time synchronization method includes selecting a grandmaster (GM) clock from the plurality of time synchronization domains; updating clock information of the grandmaster clock; determining whether each of the plurality of ports is a time receiving port or a time transmitting port according to the grandmaster clock; modifying clock attributes of each of the plurality of PTP instances according to whether the corresponding port is the time receiving port or the time transmitting port; and synchronizing, by the plurality of PTP instances, timings of the plurality of time synchronization domains according to the grandmaster clock.

Abstract: A door device includes a door body and a substrate retaining assembly. The substrate retaining assembly is disposed on a side of the door body. The substrate retaining assembly includes a retaining body and a plurality of retaining members. The retaining members are disposed on the retaining body and arranged at intervals. Each of the retaining members includes two elastic arms and a clamping structure. The clamping structure includes a clamping body, a clamping groove, and at least one relief portion. The clamping body is connected between the two elastic arms. The clamping groove is located on the clamping body and is communicated with adjacent ends of the elastic arms. The relief portion and the clamping groove are communicated to each other.

Abstract: Examples described herein relate to partitioning of processor sockets. A first processor socket includes first communication circuitry associated with a first partition identifier and a second processor socket includes a second communication circuitry associated with a second partition identifier. In some examples, based on a boot operation associated with the first processor socket: the first communication circuitry is to permit communication with the second communication circuitry based on a first partition identifier matching the second partition identifier and the first communication circuitry is to disable communication with the second communication circuitry based on the first partition identifier not matching the second partition identifier.

Abstract: A low dropout regulator (LDO) comprising an amplifier, a buffer circuit, an output circuit, a first compensation capacitor and a second compensation capacitor is provided. The buffer circuit comprises an input terminal coupled to an output terminal of the amplifier. The output circuit comprises an input terminal coupled to an output terminal of the buffer circuit, and comprises an output terminal for outputting a voltage. The first compensation capacitor is coupled between the output terminal of the output circuit and an internal cascade node of the amplifier, and configured to separate a first pole frequency of a Bode plot of the LDO from a power supply rejection ratio corner frequency. The second compensation capacitor is coupled between the input terminal of the buffer circuit and an input power source, and configured to separate a second pole frequency and a third pole frequency of the Bode plot of the LDO.

Abstract: A method includes: obtaining at least one real-time console log from a compute instance; tagging the at least one real-time console log with at least one log category based on at least one entry within the at least one real-time console log; generating at least one categorized console log; generating at least one encrypted categorized console log based on a public encryption key; publishing the at least one encrypted categorized console log to a log bus; communicating the at least one encrypted categorized console log over at least one multi-port secure tunnel to a user terminal device of a subscribed user; and publishing a private encryption key to the user terminal device of the subscribed user wherein the private encryption key facilitates decrypting the at least one encrypted categorized console log.

Abstract: Techniques for quality of service (QoS) support for input/output devices and other agents are described. In embodiments, a processing device includes execution circuitry to execute a plurality of software threads; hardware to control monitoring or allocating, among the plurality of software threads, one or more shared resources; and configuration storage to enable the monitoring or allocating of the one or more shared resources among the plurality of software threads and one or more channels through which one or more devices are to be connected to the one or more shared resources.

Abstract: A power system including a gate driver configured with test circuitry to detect faults is disclosed. The power system may be configured to test the fault detection circuitry in order to confirm its ability to detect faults. Various methods and circuit implementations are disclosed to determine the ability of the system to detect faults. The testing may include different configurations and protocols in order to make conclusions about which components are likely responsible for a failure. These components may include components included in the gate driver or externally coupled to the gate driver. The disclose approach does not significantly add complexity because a test input to initiate a test may be communicated from a low voltage side to a high voltage side over a shared communication channel.

Abstract: Described herein are ophthalmic lenses with double-sided aspherical optics containing phase¬ring structures, such as extended depth of focus (EDOF) ophthalmic lenses and multifocal lenses. Refraction of light passing through one or more regions of the phase-ring structures described herein can cause constructive interference, thereby individually or as a set producing an extended depth of focus and improved distance focus, intermediate focus, and near focus. The ophthalmic lenses described herein may provide improved vision acuity and enhanced contrast and reduce or remove visual effects such as dysphotopsia (e.g., halos and glare).