Patents by Inventor Yi Feng

Yi Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • THREE-DIMENSIONAL (3D) PRINTING
    Publication number: 20220298369
    Abstract: Compositions including polyamides and methods of employing compositions including polyamides are described herein. For instance, composition for three-dimensional (3D) printing can include a polymer build material comprising of at least two polyamides including a first polyamide and a second polyamide, where the first polyamide is present in an amount ranging of from about 95% to about 99% of a total weight of the polymer build material and where the second polyamide is present in an amount ranging of from about 1% to about 5% of the total weight of the polymer build material.
    Type: Application
    Filed: June 10, 2022
    Publication date: September 22, 2022
    Inventors: Carolin Fleischmann, Rachael Donovan, Shannon Reuben Woodruff, Yi Feng
  • Three-dimensional (3D) printing
    Patent number: 11427720
    Abstract: Compositions including polyamides and methods of employing compositions including polyamides are described herein. For instance, composition for three-dimensional (3D) printing can include a polymer build material comprising of at least two polyamides including a first polyamide and a second polyamide, where the first polyamide is present in an amount ranging of from about 95% to about 99% of a total weight of the polymer build material and where the second polyamide is present in an amount ranging of from about 1% to about 5% of the total weight of the polymer build material.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: August 30, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carolin Fleischmann, Rachael Donovan, Shannon Reuben Woodruff, Yi Feng
  • Method For Fabricating (LED) Dice Using Semiconductor Structures On A Substrate And Laser Lift-Off To A Receiving Plate
    Publication number: 20220271198
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Applicants: SemiLEDs Corporation, SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Chen-Fu Chu, SHIH-KAI CHAN, YI-FENG SHIH, DAVID TRUNG DOAN, TRUNG TRI DOAN, YOSHINORI OGAWA, KOHEl OTAKE, KAZUNORI KONDO, KEIJI OHORI, TAICHI KITAGAWA, NOBUAKI MATSUMOTO, TOSHIYUKI OZAi, SHUHEI UEDA
  • Compounds as neuronal histamine receptor-3 antagonists and uses thereof
    Patent number: 11420955
    Abstract: The present invention relates compounds of Formula (A) as H3R antagonists, as well as their preparation and uses, and further relates pharmaceutical compositions comprising these compounds and their uses as modulators of Histamine 3 Receptor (H3R) functions. The present invention also relates to the uses of the compounds or pharmaceutical compositions in treating or preventing certain disorders and diseases which relate to H3R functions in humans.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: August 23, 2022
    Assignee: XWPHARMA LTD.
    Inventors: Jia-Ning Xiang, Xuesong Xu, Yi Feng, Wai-Si Eng
  • Method for fabricating (LED) dice using laser lift-off from a substrate to a receiving plate
    Patent number: 11417799
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: August 16, 2022
    Assignees: SemiLEDs Corporation, Shin-Etsu Chemical Co., Ltd.
    Inventors: Chen-Fu Chu, Shih-Kai Chan, Yi-Feng Shih, David Trung Doan, Trung Tri Doan, Yoshinori Ogawa, Kohei Otake, Kazunori Kondo, Keiji Ohori, Taichi Kitagawa, Nobuaki Matsumoto, Toshiyuki Ozai, Shuhei Ueda
  • Compositions for printing
    Patent number: 11413816
    Abstract: The present disclosure relates to a composition for printing a three-dimensional object. The composition comprises composite particles comprising a thermoplastic 5 polymer and a colour-masking pigment. The colour-masking pigment is encapsulated by the thermoplastic polymer and is present in an amount of from about 1.5 to less than about 6 wt % of the total weight of the composite particles.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: August 16, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carolin Fleischmann, Hector Lebron, Yi Feng, Jesiska Tandy, Alay Yemane, Ali Emamjomeh
  • Integrated circuit and method for forming the same
    Patent number: 11416666
    Abstract: A method for forming an integrated circuit (IC) is provided. The method includes obtaining an IC design; generating a layout according to the IC design; calculating a score of a region in the layout based on voltage levels in the region; and fabricating a semiconductor device according to the layout when the score of the region in the layout is equal to or less than a threshold value.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Fang Lai, Guan-Yu Chen, Yi-Feng Chang
  • Method and apparatus for performing data access management of all flash array server
    Patent number: 11409471
    Abstract: The present invention provides a server including a SSD, a first node and a second node, wherein the first node comprises a first processor and a first memory, and the second node comprises a second processor and a second memory. When the first processor receives data from another device via network, the first processor stores the data in the first memory, and the first processor further sends the data to the second node; when the second processor receives the data from the first node, the second processor stores the data in the second memory, and the second processor further sends a notification to the first node to inform that the data is successfully stored in the second memory; and after and only after the first processor receives the notification from the second node, the first processor starts to write the data into the SSD.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: August 9, 2022
    Assignee: Silicon Motion, Inc.
    Inventor: Yi-Feng Lin
  • Three-dimensional printing
    Patent number: 11396130
    Abstract: An example of a three-dimensional (3D) printing kit includes a build material composition and a fusing agent to be applied to at least a portion of the build material composition during 3D printing. The build material composition includes composite particles of titanium dioxide at least partially coated with a polyether block amide polymer. The fusing agent includes an energy absorber to absorb electromagnetic radiation to coalesce the composite particles in the at least the portion.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: July 26, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Carolin Fleischmann, Rachael Donovan, Yi Feng
  • Protected multi-operators payload operations with private telemetry and command
    Patent number: 11388151
    Abstract: Systems, methods, and apparatus for protected multi-operators payload operations are disclosed. In one or more embodiments, a disclosed method for protected multi-operators payload operations comprises transmitting, by a hosted payload (HoP) operation center (HOC), encrypted hosted commands to a host spacecraft operations center (SOC). Also, the method comprises transmitting, by the host SOC, encrypted host commands and the encrypted hosted commands to a vehicle. In addition, the method comprises reconfiguring a payload on the vehicle according to unencrypted host commands and unencrypted hosted commands. Additionally, the method comprises transmitting, by a payload antenna on the vehicle, payload data to a host receiving antenna and a hosted receiving antenna. Also, the method comprises transmitting, by a host telemetry transmitter on the vehicle, encrypted host telemetry to the host SOC.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: July 12, 2022
    Assignee: The Boeing Company
    Inventors: Yi-Feng James Chen, Haig F. Krikorian, Robert J. Winig
  • Sandwich assay design for small molecules
    Patent number: 11377483
    Abstract: Methods are disclosed of designing antibodies for a sandwich assay for a small molecule having a molecular weight of about 500 to about 2,000. The method comprises preparing a first antibody that binds to the small molecule, and preparing a second antibody that binds to the small molecule at a portion of the small molecule other than a portion to which the first antibody binds. The second antibody is prepared from an immunogen that comprises a predetermined portion of the small molecule. The antibodies may be employed in sandwich assays for the small molecule.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 5, 2022
    Assignee: Siemens Healthcare Diagnostics Inc.
    Inventors: Yi Feng Zheng, Tie Q. Wei, Manoj Sharma
  • SEMICONDUCTOR DEVICE HAVING MULTIPLE ELECTROSTATIC DISCHARGE (ESD) PATHS
    Publication number: 20220208751
    Abstract: A semiconductor device is provided, including a first well of a first conductivity type disposed on a substrate, a second well of a second conductivity type, different from the conductivity type, surrounding the first well in a layout view, a third well of the first conductivity type, in which a portion of the second well is interposed between the first well and the third well, a first doped region of the second conductivity type that is in the first well and coupled to an input/output (I/O) pad; and at least one second doped region of the first conductivity type that is in the third well and coupled to a first supply voltage terminal. The first doped region, the at least one second doped region, the first well and the third well discharge a first electrostatic discharge (ESD) current between the I/O pad and the first voltage terminal.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 30, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Feng CHANG, Jam-Wem LEE
  • NOISE REDUCTION TOUCH LIGHT ADJUSTMENT DEVICE AND NOISE REDUCTION METHOD THEREOF
    Publication number: 20220179521
    Abstract: The present invention discloses a noise reduction touch light adjustment device including a light adjustment film, a capacitive touch panel, a noise reduction film, a glass substrate, a control circuit module, and an alternating current (AC) transformer. The noise reduction film is disposed between the light adjustment film and the capacitive touch panel to lower noise inputted from the AC transformer into the light adjustment film such that the capacitive touch panel is ensured to be operated precisely.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 9, 2022
    Applicant: Silicon Integrated Systems Corp.
    Inventors: Yi-Feng CHIANG, Cheng-Yi HUANG
  • High Voltage ESD Protection Apparatus
    Publication number: 20220165725
    Abstract: A device comprises a high voltage n well and a high voltage p well over a buried layer, a first low voltage n well over the high voltage n well, wherein a bottom portion of the first low voltage n well is surrounded by the high voltage n well, an N+ region over the first low voltage n well, a second low voltage n well and a low voltage p well over the high voltage p well, a first P+ region over the second low voltage n well and a second P+ region over the low voltage p well.
    Type: Application
    Filed: February 11, 2022
    Publication date: May 26, 2022
    Inventors: Yi-Feng Chang, Jam-Wem Lee
  • METHODS AND UNMANNED AERIAL VEHICLES FOR LONGER DURATION FLIGHTS
    Publication number: 20220153404
    Abstract: The present application provides an unmanned aerial vehicle (UAV) for a long duration flight. An exemplary UAV may include a UAV body assembly. The UAV may also include a flight control system (FCS) coupled to the UAV body assembly. The UAV may further include a motor coupled to the UAV body assembly at one end and coupled to a propeller at the other end. The FCS is communicatively connected to the motor. A center of gravity (CG) of the UAV is at a point between 21% and 25% of a mean aerodynamic chord (MAC) of the UAV.
    Type: Application
    Filed: February 1, 2022
    Publication date: May 19, 2022
    Applicant: GEOSAT Aerospace & Technology
    Inventors: Fu-Kai YANG, Chien-Hsun LIAO, Yi-Feng CHENG, Di-Yang WANG, Meng-Yan SHEN
  • Memory storage device and management method thereof
    Patent number: 11334290
    Abstract: A management method for managing a memory storage device compatible with a PCIe (PCI Express) standard is disclosed. The memory storage device has a plurality of pins configured to couple to a host system. The management method includes: transmitting a first command to the memory storage device through at least one first pin among the pins to control the memory storage device to enter a target link status; and when the memory storage device is in the target link status, transmitting a second command to the memory storage device through a second pin among the pins to control the memory storage device to leave the target link status. The second pin is not a pin dedicated to control the memory storage device to enter or leave the target link status.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: May 17, 2022
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yi-Feng Li, Chao-Ta Huang, Chun-Yu Ling, Jia-Huei Yeh
  • FLAT DIAPHRAGM SPEAKER
    Publication number: 20220150636
    Abstract: A hybrid diaphragm structure is provided. The hybrid diaphragm structure includes a substrate, a first diaphragm disposed in a central region of the substrate, a first coil structure disposed over the first diaphragm, a first groove separating the first diaphragm and the first coil structure from the substrate, and a first bridge structure coupling the first diaphragm to the substrate. The first diaphragm and the substrate include a same material.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 12, 2022
    Inventors: YAO-SHENG CHOU, KWUN KIT CHAN, YI FENG WEI, HSIAO-YI LIN
  • Greenhouse
    Publication number: 20220132752
    Abstract: A greenhouse comprises a support frame and a spray pipe including pipes and pipe joints, the pipe joint comprises a connecting pipe and two rotary sleeves, the two adjacent pipes are respectively inserted into the connecting pipe, ends of a first pipe are respectively sleeved with a sealing sleeve and a locking sleeve, and each of the ends of the first pipe is further sleeved with a washer. When the rotary sleeve is thread-tightened, the connecting pipe and the locking sleeve are capable of respectively abutting and pressing against two sides of the washer, under abutting and pushing of the rotary sleeve and limiting of the washer, the locking sleeve is capable of grasping the first pipe and forming an axial positioning with the rotary sleeve. An inner edge of an end surface of the connecting pipe has a sealing tapered surface capable of acting on the sealing sleeve.
    Type: Application
    Filed: December 30, 2020
    Publication date: May 5, 2022
    Inventor: Yi Feng
  • INTERLEAVED THREE PHASE Y-DELTA CONNECTED POWER CONVERTER
    Publication number: 20220140738
    Abstract: An interleaved three-phase Y-Delta connected power converter is provided. The interleaved three-phase Y-Delta connected power converter includes an input voltage source, an input capacitor, a first converter module, a second converter module, an output circuit, and a control circuit. The control circuit calculates a phase shift amount and an operating frequency through voltage and current feedbacks to generate a plurality of switch signal groups for controlling the first converter module and the second converter module, respectively.
    Type: Application
    Filed: May 6, 2021
    Publication date: May 5, 2022
    Inventors: Jing-Yuan Lin, Guan-Lin Chen, Kuan-Hung Chen, Yi-Feng Lin
  • SEMICONDUCTOR DEVICE INCLUDING TRANSISTORS SHARING GATES WITH STRUCTURES HAVING REDUCED PARASITIC CIRCUIT
    Publication number: 20220130825
    Abstract: A method includes the following operations: disconnecting at least one of drain regions that are formed on a first active area, of first transistors, from a first voltage; and disconnecting at least one of drain regions that are formed on a second active area, of second transistors coupled to the first transistors from a second voltage. The at least one of drain regions of the second transistors corresponds to the at least one of drain regions of the first transistors.
    Type: Application
    Filed: January 7, 2022
    Publication date: April 28, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Feng CHANG, Po-Lin PENG, Jam-Wem LEE