Patents by Inventor Yi Hao

Yi Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240080452
    Abstract: A video encoder with quality estimation is shown. The video encoder has a video compressor, a video reconstructor, a quality estimator, and an encoder top controller. The video compressor receives the source data of a video to generate compressed data. The video reconstructor is coupled to the video compressor for generation of playback-level data that is buffered for inter prediction by the video compressor, wherein the video reconstructor generates intermediate data and, based on the intermediate data, the video reconstructor generates playback-level data. The quality estimator is coupled to the video reconstructor to receive the intermediate data. Quality estimation is performed based on the intermediate data rather than the playback-level data. Based on the quality estimation result, the encoder top controller adjusts at least one video compression factor in real time.
    Type: Application
    Filed: July 12, 2023
    Publication date: March 7, 2024
    Inventors: Tung-Hsing WU, Chih-Hao CHANG, Yi-Fan CHANG, Han-Liang CHOU
  • Patent number: 11920237
    Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20240071330
    Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 29, 2024
    Applicant: Innolux Corporation
    Inventors: Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yu-Shih Tsou, You-Cheng Lu, Yung-Hsun Wu
  • Publication number: 20240071909
    Abstract: A semiconductor package is provided. The semiconductor package includes an encapsulating layer, a semiconductor die formed in the encapsulating layer, and an interposer structure covering the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure also includes insulating features formed on the first surface of the insulating base and extending into the encapsulating layer. The insulating features is arranged in a matrix and faces a top surface of the semiconductor die. The interposer structure further includes first conductive features formed on the first surface of the insulating base and extending into the encapsulating layer. The first conductive features surround the matrix of the insulating features.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Wen WU, Techi WONG, Po-Hao TSAI, Po-Yao CHUANG, Shih-Ting HUNG, Shin-Puu JENG
  • Publication number: 20240071833
    Abstract: The present disclosure relates to a semiconductor device with a hybrid fin-dielectric region. The semiconductor device includes a substrate, a source region and a drain region laterally separated by a hybrid fin-dielectric (HFD) region. A gate electrode is disposed above the HFD region and the HFD region includes a plurality of fins covered by a dielectric and separated from the source region and the drain region by the dielectric.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Huan Chen, Huan-Chih Yuan, Yu-Chang Jong, Scott Yeh, Fei-Yun Chen, Yi-Hao Chen, Ting-Wei Chou
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071847
    Abstract: A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Huan Liao, Ping-Yin Hsieh, Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Ying-Ching Shih
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240009790
    Abstract: A method includes steps of: performing preparation-phase measurements on a spindle of a machine tool to generate normal-condition signals; establishing a reference model based on the normal-condition signals; generating abnormal-condition signals based on the reference model and a preset damage value; utilizing principal components analysis (PCA) to characterize the normal-condition and abnormal-condition signals to obtain normal and abnormal probabilistic models, determining normal-condition and abnormal-condition reference curves based on the normal and abnormal probabilistic models; determining an alert-triggering line based on the abnormal-condition reference curve; determining a permissible range between the alert-triggering line and the normal-condition reference curve; and generating a warning signal when it is determined that a detection value falls outside of the permissible range, wherein the detection value is obtained based on application-phase measurements performed on the spindle.
    Type: Application
    Filed: December 16, 2022
    Publication date: January 11, 2024
    Inventors: TZU-CHI CHAN, JYUN-DE LI, YI-FAN SU, XIAN-YOU SHAO, YI-HAO CHEN, SHINN-LIANG CHANG, I-HUNG WANG, SHAO-CHI WU
  • Publication number: 20230418256
    Abstract: A measuring unit is used to measure a specific dimension of a product feature within a time segment to generate a measured dimension value. A processing unit compares the measured dimension value with a standard dimension value to generate an offset value. A control unit generates a control instruction based on the offset value, and transmits the control instruction to a machine on which machining member that is used to form the product feature is installed, so that the machine performs tool compensation on the machining member according to the control instruction.
    Type: Application
    Filed: December 2, 2022
    Publication date: December 28, 2023
    Inventors: TZU-CHI CHAN, CHIA-CHUAN CHANG, HAN-HUEI LIN, YI-HAO CHEN
  • Patent number: 11834475
    Abstract: Provided herein are polypeptides, polynucleotides, expression vectors, infectious clones, virus particles and immunogenic compositions of recombinant alphaviruses which can be used as vaccines. Also provided are methods for eliciting an immune response against alphavirus infection using the immunogenic composition comprising the alphavirus mutants described herein.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: December 5, 2023
    Assignees: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH, University of Tartu
    Inventors: Lisa Fong Poh Ng, Yi Hao Chan, Andres Merits, Age Utt
  • Patent number: 11815970
    Abstract: System boot-up can be enabled in low temperature environments. A laptop or other battery-powered computing device can include multiple batteries and a battery architecture that allows the multiple batteries to simultaneously discharge to thereby provide adequate power to boot the system in low temperature environments. The battery architecture may also allow a battery with a higher relative state of charge to charge another battery with a lower relative state of charge to thereby equalize the batteries' relative states of charge.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: November 14, 2023
    Assignee: Dell Products L.P.
    Inventors: Yi-Hao Yeh, Gary Charles, John Robert Lerma, Cheng-Hung Yang, Wei-Che Chang
  • Publication number: 20230305611
    Abstract: System boot-up can be enabled in low temperature environments. A laptop or other battery-powered computing device can include multiple batteries and a battery architecture that allows the multiple batteries to simultaneously discharge to thereby provide adequate power to boot the system in low temperature environments. The battery architecture may also allow a battery with a higher relative state of charge to charge another battery with a lower relative state of charge to thereby equalize the batteries' relative states of charge.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 28, 2023
    Inventors: Yi-Hao Yeh, Gary Charles, John Robert Lerma, Cheng-Hung Yang, Wei-Che Chang
  • Patent number: 11729937
    Abstract: An environment detecting module, for securing a shell of a server, includes a sensing module, configured to sense an environment status by a polling method and generate a sensing signal according to the environment status; a connection module, configured to electrically connect the environment detecting module to a host terminal with a first connection status or a second connection status; and a microcontroller unit, coupled to the sensing module and the connection module, configured to determine a power source of the environment detecting module according to the first connection status or the second connection status, and to determine a first mode or a second mode of the environment detecting module according to the power source.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: August 15, 2023
    Assignee: Wiwynn Corporation
    Inventors: Yi-Hao Chen, Cheng-Kuang Hsieh, Yung-Ti Chung, Jheng-Ying Jiang
  • Patent number: 11720277
    Abstract: A control system and a control method are provided. The control system provides a first setting signal in response to an abnormal read-write operation performed on at least one storage device. The control system generates a first state signal having a first logic value in response to the first setting signal and latches the first state signal, and disables the at least one storage device on which the abnormal read-write operation is performed in response to the first state signal having the first logic value. The control system includes a restart input module. The restart input module converts the first logic value of the latched first state signal into a second logic value, so that the control system restarts the at least one storage device disabled in response to the first state signal having the second logic value.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: August 8, 2023
    Assignee: Wiwynn Corporation
    Inventors: Yahsuan Tseng, Kai-Sheng Chen, Yi-Hao Chen, Chung Fu Huang
  • Patent number: 11699849
    Abstract: An antenna device includes antennas to receive and transmit signals; and a processor to divide radiation patterns of combinations of the antennas into a predetermined number of characteristic patterns, and to calculate similarities of the characteristic patterns and a RSSI of each of the characteristic patterns. When the antenna device is in operation, the processor reads and analyzes RSSI of the signals received by the antennas, compares the RSSI of the signals of the antennas with the RSSI of the characteristic patterns, and determines a matched characteristic pattern group according to results of comparisons and the similarities of the characteristic patterns.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: July 11, 2023
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventors: Ying-Chieh Wang, Yi-Hao Chang
  • Publication number: 20230205949
    Abstract: A system and method for efficient power analysis of an integrated circuit are described. In various implementations, a memory of a computing system stores combinatorial logic gate-level data describing functionality of a pre-silicon, gate-level representation of the integrated circuit being designed. The circuitry of the processor accesses this data, and also divides the integrated circuit into portions based on functionality. The circuitry of the processor generates first power estimation values over time for a selected first portion by executing a power estimation tool on the first portion. Afterward, the circuitry of the processor trains a data model, such as a neural network, using the generated first power estimation values. The circuitry of the processor then generates second power estimation values over time for one or more other portions by executing the data model on these portions.
    Type: Application
    Filed: December 24, 2021
    Publication date: June 29, 2023
    Inventors: Peng Zhang, Yuee Wu, He Guan, Xiaoxi Sun, Yi Hao
  • Publication number: 20230204155
    Abstract: A handle grip includes a base extension and a top seat. The base extension has a shell, an opening is arranged at a free end of the shell, and an accommodation space is provided in the shell and connected with the opening, the accommodating space can be filled in with liquid or solid materials, and the base extension can be detachably covered by the top seat. So that a user can freely adjust the weight of the handle grip according to the operation requirement of the work on miniature, neither the handle grip will fall down on the workbench easily, nor user will feel burdened when holding the handle grip, so that it will improve the working quality and efficiency.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 29, 2023
    Inventor: Yi-Hao Lee
  • Patent number: 11681647
    Abstract: An electronic apparatus and a hot-swappable storage device thereof are provided. The hot-swappable storage device includes a carrier, a connector, a controller, and a wireless communication interface. The carrier is configured to carry a plurality of storage components. The connector is configured to be electronically connected to a host end for performing a data transfer operation. The controller detects a connection status between the connector and the host end. The wireless communication interface decides whether to perform the data transfer operation according to the connection status.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: June 20, 2023
    Assignee: Wiwynn Corporation
    Inventors: Yi-Hao Chen, Cheng Kuang Hsieh
  • Patent number: D1005819
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: November 28, 2023
    Inventor: Yi-Hao Lee