Patents by Inventor Yi-Ju Hsu

Yi-Ju Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240065765
    Abstract: A method of orthopedic treatment includes steps of: by using a computer aided design (CAD) tool based on profile data that is related to a to-be-treated part of a bone of a patient, obtaining a model of a preliminary instrument that substantially fits the to-be-treated part; by using the CAD tool, obtaining a model of a patient specific instrument (PSI) based on the model of the preliminary instrument; producing the PSI based on the model of the PSI, the PSI being adjustable; performing medical operation on the to-be-treated part, and then attaching the PSI to the to-be-treated part; after attaching the PSI to the to-be-treated part, adjusting the PSI such that the PSI is adapted to real conditions of the to-be-treated part.
    Type: Application
    Filed: August 22, 2023
    Publication date: February 29, 2024
    Inventors: Alvin Chao-Yu CHEN, Yi-Sheng CHAN, Chi-Pin HSU, Shang-Chih LIN, Chin-Ju WU, Jeng-Ywan JENG
  • Patent number: 11779615
    Abstract: The present invention provides a lactic acid bacteria composition, which comprises: a Lactobacillus plantarum PL-02 strain, a Lactobacillus acidophilusTYCA06 strain, a Lactobacillus casei CS-773 strain, and a physiologically acceptable excipient, diluent, or carrier. All of the strains are deposited at the China General Microbiological Culture Collection Center.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: October 10, 2023
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Chi-Chang Huang, Mon-Chien Lee, Yi-Ju Hsu, Hsieh-Hsun Ho, Yi-Wei Kuo, Wen-Yang Lin, Jia-Hung Lin, Chi-Huei Lin
  • Publication number: 20230307522
    Abstract: A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
    Type: Application
    Filed: April 3, 2023
    Publication date: September 28, 2023
    Inventors: Cheng-Yi PENG, Wen-Yuan CHEN, Wen-Hsing HSIEH, Yi-Ju HSU, Jon-Hsu HO, Song-Bor LEE, Bor-Zen TIEN
  • Patent number: 11621343
    Abstract: A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: April 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yi Peng, Wen-Yuan Chen, Wen-Hsing Hsieh, Yi-Ju Hsu, Jon-Hsu Ho, Song-Bor Lee, Bor-Zen Tien
  • Patent number: 11524038
    Abstract: Disclosed herein is a composition including Lactobacillus plantarum TWK10 deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession number CGMCC 13008 for use in treating sarcopenia and for use in maintaining and/or increasing muscle mass and/or strength in an elderly subject.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: December 13, 2022
    Assignee: SYNBIO TECH INC.
    Inventors: Chia-Chia Lee, Han-Yin Hsu, Chi-Chang Huang, Yi-Ju Hsu, Mon-Chien Lee
  • Publication number: 20220347238
    Abstract: The present invention provides a lactic acid bacteria composition, which comprises: a Lactobacillus plantarum PL-02 strain, a Lactobacillus acidophilusTYCA06 strain, a Lactobacillus casei CS-773 strain, and a physiologically acceptable excipient, diluent, or carrier.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 3, 2022
    Inventors: Chi-Chang HUANG, Mon-Chien LEE, Yi-Ju HSU, Hsieh-Hsun HO, Yi-Wei KUO, Wen-Yang LIN, Jia-Hung LIN, Chi-Huei LIN
  • Publication number: 20220072070
    Abstract: Disclosed herein is a composition including Lactobacillus plantarum TWK10 deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession number CGMCC 13008 for use in improving walking capacity of an elderly subject.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 10, 2022
    Inventors: Chia-Chia LEE, Han-Yin HSU, Chi-Chang HUANG, Yi-Ju HSU, Mon-Chien LEE
  • Publication number: 20210351282
    Abstract: A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 11, 2021
    Inventors: Cheng-Yi PENG, Wen-Yuan CHEN, Wen-Hsing HSIEH, Yi-Ju HSU, Jon-Hsu HO, Song-Bor LEE, Bor-Zen TIEN
  • Publication number: 20210228657
    Abstract: An isolated lactic acid bacteria strain: Bifidobacterium longum subsp. longum OLP-01 strain for increasing exercise performance and ameliorating fatigue is disclosed. A variety of animal experiments have proved that OLP-01 not only effectively improves muscle strength and swimming endurance but also significantly reduces fatigue-related biochemical indicators, including blood lactate, blood urea nitrogen and the activity of creatine kinase.
    Type: Application
    Filed: April 13, 2021
    Publication date: July 29, 2021
    Inventors: Chi-Chang HUANG, Wei-Ling CHEN, Mon-Chien LEE, Yi-Ju HSU, Hsieh-Hsun HO, Shin-Yu TSAI, Wen-Yang LIN, Yi Wei KUO
  • Patent number: 11069791
    Abstract: A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: July 20, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Peng, Wen-Yuan Chen, Wen-Hsing Hsieh, Yi-Ju Hsu, Jon-Hsu Ho, Song-Bor Lee, Bor-Zen Tien
  • Publication number: 20210008131
    Abstract: Disclosed herein is a composition including Lactobacillus plantarum TWK10 deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession number CGMCC 13008 for use in treating sarcopenia and for use in maintaining and/or increasing muscle mass and/or strength in an elderly subject.
    Type: Application
    Filed: January 16, 2020
    Publication date: January 14, 2021
    Inventors: Chia-Chia LEE, Han-Yin HSU, Chi-Chang HUANG, Yi-Ju HSU, Mon-Chien LEE
  • Publication number: 20200338142
    Abstract: An isolated lactic acid bacteria strain: Bifidobacterium longum subsp. longum OLP-01 strain for increasing exercise performance and ameliorating fatigue is disclosed. A variety of animal experiments have proved that OLP-01 not only effectively improves muscle strength and swimming endurance but also significantly reduces fatigue-related biochemical indicators, including blood lactate, blood urea nitrogen and the activity of creatine kinase.
    Type: Application
    Filed: July 17, 2019
    Publication date: October 29, 2020
    Inventors: Chi-Chang HUANG, Wei-Ling CHEN, Mon-Chien LEE, Yi-Ju HSU, Hsieh-Hsun HO, Pei-Shan HSIEH
  • Publication number: 20200135891
    Abstract: A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 30, 2020
    Inventors: Cheng-Yi PENG, Wen-Yuan CHEN, Wen-Hsing HSIEH, Yi-Ju HSU, Jon-Hsu HO, Song-Bor LEE, Bor-Zen TIEN
  • Patent number: 10326006
    Abstract: A FinFET device includes a substrate, a fin formed on the substrate, and a gate electrode crossing the fin. The gate electrode includes a head portion and a tail portion, and the tail portion is connected to the head portion and extended toward the substrate. The width of the head portion is greater than that of the tail portion.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Ming Peng, Chi-Wen Liu, Hsin-Chieh Huang, Yi-Ju Hsu, Horng-Huei Tseng
  • Publication number: 20190148523
    Abstract: A FinFET device includes a substrate, a fin formed on the substrate, and a gate electrode crossing the fin. The gate electrode includes a head portion and a tail portion, and the tail portion is connected to the head portion and extended toward the substrate. The width of the head portion is greater than that of the tail portion.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 16, 2019
    Inventors: Yen-Ming Peng, Chi-Wen Liu, Hsin-Chieh Huang, Yi-Ju Hsu, Horng-Huei Tseng
  • Patent number: 10164071
    Abstract: A FinFET device includes a substrate, a fin formed on the substrate, and a gate electrode crossing the fin. The gate electrode includes a head portion and a tail portion, and the tail portion is connected to the head portion and extended toward the substrate. The width of the head portion is greater than that of the tail portion.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Ming Peng, Chi-Wen Liu, Hsin-Chieh Huang, Yi-Ju Hsu, Horng-Huei Tseng
  • Patent number: 10164059
    Abstract: A FinFET device includes a substrate, a fin formed on the substrate, and a gate electrode crossing the fin. The gate electrode includes a head portion and a tail portion, and the tail portion is connected to the head portion and extended toward the substrate. The width of the head portion is greater than that of the tail portion.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Ming Peng, Chi-Wen Liu, Hsin-Chieh Huang, Yi-Ju Hsu, Horng-Huei Tseng
  • Publication number: 20180337267
    Abstract: A FinFET device includes a substrate, a fin formed on the substrate, and a gate electrode crossing the fin. The gate electrode includes a head portion and a tail portion, and the tail portion is connected to the head portion and extended toward the substrate. The width of the head portion is greater than that of the tail portion.
    Type: Application
    Filed: July 31, 2018
    Publication date: November 22, 2018
    Inventors: Yen-Ming Peng, Chi-Wen Liu, Hsin-Chieh Huang, Yi-Ju Hsu, Horng-Huei Tseng
  • Publication number: 20180337248
    Abstract: A semiconductor device and method of manufacturing same are described. A first hafnium oxide (HfO2) layer is formed on a substrate. A titanium (Ti) layer is formed over the first hafnium oxide layer. A second hafnium oxide layer is formed over the titanium layer. The composite device structure is thermally annealed to produce a high-k dielectric structure having a hafnium titanium oxide (HfxTi1-xO2) layer interposed between the first hafnium oxide layer and the second hafnium oxide layer.
    Type: Application
    Filed: July 31, 2018
    Publication date: November 22, 2018
    Inventors: I-Chen Huang, Yi-Ju Hsu, Chi-Wen Liu, Kuang-Hsin Chen, Yung-Hsien Wu, Chin-Yu Chen
  • Patent number: 10068984
    Abstract: A semiconductor device and method of manufacturing same are described. A first hafnium oxide (HfO2) layer is formed on a substrate. A titanium (Ti) layer is formed over the first hafnium oxide layer. A second hafnium oxide layer is formed over the titanium layer. The composite device structure is thermally annealed to produce a high-k dielectric structure having a hafnium titanium oxide (HfxTi1-xO2) layer interposed between the first hafnium oxide layer and the second hafnium oxide layer.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: September 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Chen Huang, Yi-Ju Hsu, Chi-Wen Liu, Kuang-Hsin Chen, Yung-Hsien Wu, Chin-Yu Chen