Patents by Inventor Yi-Kai Wang

Yi-Kai Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100164837
    Abstract: An electronic device and a display panel thereof are provided. The electronic device includes a first display panel and a casing. The first display panel has a first displaying part and a second displaying part. The first display panel includes a first bending mechanism which is disposed between the first displaying part and the second displaying part to bend or spread the first display panel. The casing has a first surface and a second surface opposite to the first surface. The casing includes a rail mechanism which is disposed on the second surface. The second displaying part is slid on the rail mechanism to shift the first display panel relatively to the casing.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 1, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Jen Kao, Yi-Kai Wang, Yu-Rung Peng, Tsung-Hua Yang, Tarng-Shiang Hu
  • Patent number: 7741163
    Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: June 22, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
  • Publication number: 20100096620
    Abstract: A method of fabricating an organic thin film transistor is provided. The method includes forming a source, a drain and a gate on a substrate and forming a dielectric layer to isolate the gate from the source and isolate the gate from the drain. An organic active material layer is formed on the substrate to fill a channel region between the source and the drain and cover the source and the drain. A barrier material layer is formed on the organic active material layer. Thereafter, the barrier material layer and the organic active material layer are patterned to form a barrier layer and an organic active layer and expose the source and the drain.
    Type: Application
    Filed: December 25, 2008
    Publication date: April 22, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Jen Kao, Yu-Rung Peng, Tsung-Hua Yang, Yi-Kai Wang, Tarng-Shiang Hu
  • Publication number: 20100063740
    Abstract: A rechargeable biosensor for the quantitative determination of an analyte is disclosed. The rechargeable biosensor mainly comprises a charging circuit, a charge storage circuit, and an operation circuit. The charging circuit may be selectively electrically coupled to an external power source for receiving a voltage; the charge storage circuit is electrically coupled to the charging circuit and being rechargeable by the charging circuit when the charging circuit is electrically coupled to the external power source; the operation circuit is electrically coupled to the charge storage circuit for receiving an operation voltage from the charge storage circuit, wherein the operation circuit is adapted to measure an electrical signal derived from the analyte and output a quantitative property of the analyte.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Applicant: VISGENEER, INC.
    Inventors: Ken-Shwo Dai, Yi-Kai Wang
  • Patent number: 7638374
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: December 29, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20090311352
    Abstract: A method for removing pests from harvested vegetables has steps of extracting a first portion of harvested vegetables to obtain a vegetable cleanser, and cleaning a second portion of harvested vegetables with the vegetable cleanser, such that pests residing on the second portion of harvested vegetables are removed from the second portion of harvested vegetables, wherein the first portion of harvested vegetables and the second portion of harvested vegetables independently contain vegetables selected from the group consisting of vegetables belonging to the families of Cruciferae, Compositae, Chenopodiaceae and Amaranthaceae. The aforementioned method is effective at removing pests from harvested vegetables and satisfies urgent needs to reduce use of chemical pesticides.
    Type: Application
    Filed: July 2, 2009
    Publication date: December 17, 2009
    Inventors: Tin-Yin Liu, Yi-Kai Wang, Mei-Ling Lu
  • Publication number: 20090298241
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Application
    Filed: August 6, 2009
    Publication date: December 3, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20090267075
    Abstract: A method of manufacturing an organic thin film transistor is described. A patterned insulating layer having an opening therein is formed on a substrate. A gate is formed in the opening of the insulating layer, and a gate insulating layer is formed on the gate. A conductive material layer is formed on the gate insulating layer by a printing process. One of the gate insulating layer and the conductive material layer is hydrophobic or hydrophilic and the other is hydrophilic or hydrophobic, such that the conductive material layer is naturally separated to two sides of the gate insulating layer to form a source and a drain. An active layer is formed on the gate insulating layer between the source and the drain.
    Type: Application
    Filed: February 17, 2009
    Publication date: October 29, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Jing-Yi Yan, Jia-Chong Ho
  • Patent number: 7588971
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: September 15, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20090223287
    Abstract: A bio-monitoring system used for the determination of analyte in a liquid sample, comprising (1) a meter and a test strip integrated using RFID, wherein the RFID comprises a RFID reader and a RFID tag, wherein the RFID tag is embedded in the test strip or attached to the test strip vial/container, and the RFID tag stores the calibration parameters and strip type information of the test strip; and (2) a radio transmission process system.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Applicant: Visgeneer, Inc.
    Inventors: Ken-Shwo Dai, Yi-Kai Wang
  • Patent number: 7582898
    Abstract: This invention provides a circuit structure with a double-gate organic thin film transistor device and application thereof. A protection layer covered on an organic thin film transistor structure having a bottom gate is used as another gate insulating layer. A metal layer is formed on this gate insulating layer to serve as another gate. A double-gate structure is hence accomplished. The double-gate structure can be used in a circuit. By the double-gate structure the threshold voltage of the organic thin film transistor can be adjusted, and advantageously changing the characteristic of the organic thin film transistor to improve the accuracy of signal transmission.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: September 1, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Wu Wang, Yi-Kai Wang, Chen-Pang Kung, Chih-Wen Hsiao
  • Publication number: 20090102375
    Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.
    Type: Application
    Filed: December 30, 2008
    Publication date: April 23, 2009
    Applicant: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
  • Publication number: 20090101899
    Abstract: A stacked structure including a soluble organic semiconductor material and a water soluble photosensitive material is provided. The water soluble photosensitive material is disposed on the surface of the soluble organic semiconductor material.
    Type: Application
    Filed: March 2, 2008
    Publication date: April 23, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Hsien Yu, Jia-Chong Ho, Yi-Kai Wang, Ya-Lang Chen
  • Publication number: 20090075437
    Abstract: A method of TFT (Thin Film Transistor) manufacturing and a substrate structure are provided. The structure includes a substrate and a self-alignment mask. A self-alignment mask on a substrate is first manufactured and then the self-alignment mask may synchronously extend with the substrate during the thermal process. When an exposure light source is provided on the side without a TFT formed, the self-alignment mask can overcome the problem that when a plastic substrate extends, the positions of the source and drain to be formed on the plastic substrate are incorrect, which has a great effect on the accuracy of alignment. As the result, the positions of the source and drain can be defined accurately.
    Type: Application
    Filed: November 26, 2008
    Publication date: March 19, 2009
    Applicant: INDUSTRIAL RESEARCH INSTITUTE
    Inventors: Liang-Yin Huang, Yi-Kai Wang, Tarng-Shiang Hu, Jia-Chong Ho
  • Publication number: 20080248142
    Abstract: A method of preparing pest repellent for harvesting plants, a method of processing agricultural harvested products, a method of treating vegetable waste, a method for producing a cleansing composition for pest repellent and a cleansing composition for pest repellent are provided. The method of preparing pest repellant comprises providing plants, collecting parts of the plants, obtaining an extract from the parts of the plants, and applying the extract to the harvested plants. The method for processing agricultural harvested products comprises providing harvested agricultural products, collecting parts of the harvested agricultural products, obtaining an extract from the parts of the harvested agricultural products and applying the extract to clean the harvested agricultural products.
    Type: Application
    Filed: June 28, 2007
    Publication date: October 9, 2008
    Inventors: Tin-Yin Liu, Yi-Kai Wang, Mei-Ling Lu
  • Publication number: 20080102567
    Abstract: A method for making a thin film transistor (TFT) is provided. A mask is first formed on the backside of a substrate, and is used to fabricate a gate, source, and drain of the transistor by backside exposure, such that the source and drain can be self-aligned with the gate pattern. In this way, an alignment shift due to expansion or contraction after performing a high temperature process on an insulating layer can be avoided. Further, since the backside mask previously formed on the substrate can be shifted with the expansion or contraction of the substrate, the process is simplified. Moreover, the source/drain can be accurately aligned with the gate, so that parasitic capacitance can be reduced and flickering of the panel can be avoided.
    Type: Application
    Filed: October 11, 2007
    Publication date: May 1, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20080099843
    Abstract: A structure of a thin film transistor (TFT) is provided. A substrate has a first surface and a second surface opposite to each other, in which the first surface has a patterned mask layer. A patterned first electrode layer is disposed on the second surface of the substrate and has a gate portion and a capacitor electrode portion. A patterned second electrode layer is disposed on the second surface of the substrate and has a source and a drain, in which the patterned second electrode layer is self-aligned with the patterned first electrode layer by exposing the first surface of the substrate with the patterned mask layer as a mask. An insulating layer is disposed between the patterned first electrode layer and the patterned second electrode layer.
    Type: Application
    Filed: October 11, 2007
    Publication date: May 1, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20080014686
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 17, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Publication number: 20070257252
    Abstract: This invention provides a circuit structure with a double-gate organic thin film transistor device and application thereof. A protection layer covered on an organic thin film transistor structure having a bottom gate is used as another gate insulating layer. A metal layer is formed on this gate insulating layer to serve as another gate. A double-gate structure is hence accomplished. The double-gate structure can be used in a circuit. By the double-gate structure the threshold voltage of the organic thin film transistor can be adjusted, and advantageously changing the characteristic of the organic thin film transistor to improve the accuracy of signal transmission.
    Type: Application
    Filed: July 20, 2006
    Publication date: November 8, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Wu Wang, Yi-Kai Wang, Chen-Pang Kung, Chih-Wen Hsiao
  • Publication number: 20070160813
    Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.
    Type: Application
    Filed: September 19, 2006
    Publication date: July 12, 2007
    Inventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho