Patents by Inventor Yimin Chen

Yimin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250028649
    Abstract: The present disclosure provides a data processing method and apparatus, an electronic device, and a storage medium. The data processing provided by the present disclosure includes: receiving a first request message from a first device, where the first request message includes a first address aligned with a first data length and a first size in a unit of the first data length; converting the first address into a second address aligned with a second data length, where the second data length is greater than the first data length; converting the first size into a second size in a unit of the second data length; and sending a second request message to a second device, where the second request message includes the second address and the second size.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 23, 2025
    Inventors: Zhilin XU, Qi CHEN, Longfei BAI, Yimin CHEN, Jian WANG
  • Publication number: 20240413758
    Abstract: A switching power converter is provided with digital control of a constant-power mode. During the constant-power mode, the switching power converter may approximate an analog constant-power mode by incrementing or decrementing the output voltage by discrete voltage steps. At each discrete voltage step, the output current may vary within a range while the output voltage is kept constant. Alternatively, the switching power converter may approximate an analog constant-power mode by incrementing or decrementing the output current by discrete current steps. At each discrete current step, the output voltage may vary within a range while the output current is kept constant.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 12, 2024
    Inventors: Tao Li, Yimin Chen, Juyoung Yoon
  • Publication number: 20240378103
    Abstract: A bus anomaly detecting method, processing method, apparatus, system, device, and medium. The bus anomaly detecting method includes: at an interface for connecting a bus, activating a detection state in response to an access initiating apparatus sending an access request to an access receiving apparatus so as to, in the detection state, perform anomaly detection on response signal fed back by the access receiving apparatus for each access request, and block an interruption signal sent by the access initiating apparatus; in response to a response signal corresponding to an access request having an anomaly, terminating the detection state, recording bus anomaly information, and sending an interruption signal; and in a case where the response signal corresponding to each access request sent by the access initiating apparatus is received and has no anomaly, terminating the detection state to stop blocking the interruption signal sent by the access initiating apparatus.
    Type: Application
    Filed: May 10, 2024
    Publication date: November 14, 2024
    Inventors: Pengjie DENG, Qi CHEN, Yimin CHEN, Shan LU, Jian WANG
  • Publication number: 20240378022
    Abstract: A data conversion method and apparatus, an electronic device and a storage medium for converting dimensions of a first data combination. The data conversion method includes: reading n elements in the first data combination according to a first-dimension direction to obtain a first processing group, a first element to an n-th element in the first processing group are arranged according to the first-dimension direction, and n is a positive integer; performing a transpose on the first dimension and the third dimension of the first processing group to obtain a second processing group, a first element to an n-th element in the second processing group are arranged in a third-dimension direction; and writing the first element to the n-th element in the second processing group to a first storage.
    Type: Application
    Filed: May 3, 2024
    Publication date: November 14, 2024
    Inventors: Zhilin XU, Longfei BAI, Qi CHEN, Yimin Chen, Shan Lu, Jian Wang
  • Publication number: 20240355978
    Abstract: A circuit board includes a substrate and a stress neutral layer disposed on a side of the substrate. The stress neutral layer includes one or more first metal layers and one or more second metal layers. The one or more second metal layers and the one or more first metal layers are stacked. At least one of the one or more first metal layers is made of a material for generating a tensile stress, and at least one of the one or more second metal layers is made of a material for generating a compressive stress.
    Type: Application
    Filed: April 21, 2022
    Publication date: October 24, 2024
    Inventors: Nianqi YAO, Zhongpeng TIAN, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Jiayu HE, Feifei LI, Kun ZHAO, Yimin CHEN
  • Publication number: 20240354368
    Abstract: A method and a system for performing a matrix multiplication operator using a unit supporting convolution operator operation, an electronic device, and a non-transitory storage medium are provided. The method includes: transforming a first matrix of the matrix multiplication operator to an input data matrix of a convolution operator; transforming a second matrix of the matrix multiplication operator to a weight matrix of the convolution operator, matrix multiplication being performed on the first matrix and the second matrix; and performing a convolution operation on the input data matrix and the weight matrix, which are obtained through transforming, of the convolution operator using the unit supporting convolution operator operation to obtain an operation result of the matrix multiplication operator.
    Type: Application
    Filed: April 23, 2024
    Publication date: October 24, 2024
    Inventors: Longfei BAI, Qi CHEN, Zhitao YANG, Zhilin XU, Yimin CHEN, Shan LU, Jian WANG
  • Publication number: 20240345806
    Abstract: A computing apparatus and method, an electronic device and a storage medium are provided. The computing apparatus includes: a preprocessing module configured to receive N pairs of input parameters, and perform format conversion on each pair of input parameters according to the precision type of the N pairs of input parameters, and obtain N pairs of processed input parameters; and a calculation module configured to respectively compute a product of exponents and mantissas of each pair of processed input parameters, and obtain an output result based on the product of exponents and mantissas of each pair of processed input parameters. The computing apparatus supports multiply-accumulate computation of a plurality of floating-point types. The computing apparatus can multiplex the multiplication computation of the mantissa and make the computing apparatus support multiply-accumulate computations in a plurality of precision formats at the cost of lower area and power consumption.
    Type: Application
    Filed: April 9, 2024
    Publication date: October 17, 2024
    Inventors: Zhitao Yang, Qi Chen, Jian Lai, Yimin Chen, Shan Lu, Jian Wang
  • Patent number: 12072356
    Abstract: A voltage detection circuit and method for an integrated circuit, and an integrated circuit are provided. The voltage detection circuit includes: a first current source, a first branch and a second branch. A current outputted by the first current source is allocated to the first branch and the second branch. The first branch includes a first voltage control current component and a first load connected in series. The second branch includes a current signal detection component and a second load connected in series. A voltage signal to be detected is inputted to a control signal input terminal of the first voltage control current component. The current signal detection component is configured to output, in real time, a preset signal characterizing a second current flowing through the second branch, to determine change of the voltage signal to be detected based on the preset signal.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: August 27, 2024
    Assignee: Lemon Inc.
    Inventors: Junmou Zhang, Shan Lu, Chuang Zhang, Yimin Chen, Jian Wang, Yuanlin Cheng
  • Patent number: 12013804
    Abstract: An integrated circuit, and a data processing device and method are provided. The integrated circuit includes a processor circuit and an accelerator circuit. The processor circuit includes a processor, a first data storage section, and a first data input/output interface. The accelerator circuit includes an accelerator and a second data input/output interface. The second data input/output interface is electrically connected to the first data input/output interface, so that the accelerator circuit can perform information interaction with the first data storage section.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: June 18, 2024
    Assignee: Lemon Inc.
    Inventors: Yimin Chen, Shan Lu, Junmou Zhang, Chuang Zhang, Yuanlin Cheng, Jian Wang
  • Publication number: 20240192430
    Abstract: The invention discloses an area light source device comprises: a light guide body comprising an incidence plane, a front exit plane and a rear exit plane which extend along two opposite sides of the incidence plane; a light emitting body disposed along a side of the incidence plane of the light guide body; a structural layer disposed on one side of the rear exit plane, and used for changing the direction of light from the light guide body to the structural layer and emitting the light in a direction away from the rear exit plane; and second medium layers wrapped in the structural layer, wherein the refractive index of a material of the second medium layers is less than the refractive index of a material of the structural layer. The invention further discloses a flat panel display device.
    Type: Application
    Filed: April 1, 2022
    Publication date: June 13, 2024
    Applicant: SUZHOU CRYSTALENT CO., LTD.
    Inventors: Yimin CHEN, Peng WU, Tong LI, Shujin ZHOU
  • Patent number: 11982831
    Abstract: An anti-peeping backlight module is formed by stacking an upper backlight module, a lower backlight module and a reflecting film disposed below the lower backlight module, wherein the upper backlight module is a transparent module, the lower backlight module is a transparent module or a non-transparent module, the upper backlight module is a collimating backlight module or a diffusion backlight module, the lower backlight module is a collimating backlight module or a diffusion backlight module, and the upper backlight module and the lower backlight module have different properties. The anti-peeping backlight module realizes beam splitting and collimation and can be used as various backlight modules, the beam splitting angle is adjustable, the efficiency is high, and can be controlled independently.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: May 14, 2024
    Assignee: MAANSHAN-JINGZHI TECHNOLOGY CO LTD
    Inventors: Tong Li, Peng Wu, Yimin Chen
  • Publication number: 20240152474
    Abstract: An on-chip integrated circuit, a data processing device and a method are provided. The on-chip integrated circuit includes: a processor circuit and an accelerator circuit. The processor circuit includes a processor and a data storage area, the processor is connected to the data storage area through a first bus in the processor circuit. The accelerator circuit includes an accelerator and a second bus, the accelerator is connected to the second bus, and the second bus is bridged with the first bus corresponding to the data storage area, to perform data interaction between the accelerator and the data storage area, which can reduce the congestion on a bus of the processor and improve the quality of service of the application.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Yimin CHEN, Shan LU, Chuang ZHANG, Junmou ZHANG, Yuanlin CHENG, Jian WANG
  • Patent number: 11948845
    Abstract: The present disclosure relates to a device and a system for testing flatness. The device for testing flatness includes a base, a testing platform, and a ranging sensor. The testing platform is assembled on the base. The testing platform includes a supporting structure. The supporting structure is disposed on the side of the testing platform away from the base and is used to support a to-be-tested board. The structure matches the structure of the to-be-tested board. The ranging sensor is disposed on the side of the testing platform away from the base. After the to-be-tested board is placed on the testing platform, the ranging sensor is used to test distances between a number N of to-be-tested positions on the to-be-tested board and the ranging sensor, to obtain N pieces of distance information, and the N pieces of distance information are used to determine the flatness of the to-be-tested board, where N is an integer greater than 2.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: April 2, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Shaodong Sun, Haoran Gao, Guangcai Yuan, Lilei Zhang, Wenyue Fu, Li Li, Hanbo Zheng, Shuqi Liu, Qi Qi, Junwei Yan, Pingkuan Gu, Lina Jing, Yan Chen, Yimin Chen
  • Patent number: 11914540
    Abstract: An on-chip integrated circuit, a data processing device and a method are provided. The on-chip integrated circuit includes: a processor circuit and an accelerator circuit. The processor circuit includes a processor and a data storage area, the processor is connected to the data storage area through a first bus in the processor circuit. The accelerator circuit includes an accelerator and a second bus, the accelerator is connected to the second bus, and the second bus is bridged with the first bus corresponding to the data storage area, to perform data interaction between the accelerator and the data storage area, which can reduce the congestion on a bus of the processor and improve the quality of service of the application.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: February 27, 2024
    Assignee: Lemon Inc.
    Inventors: Yimin Chen, Shan Lu, Chuang Zhang, Junmou Zhang, Yuanlin Cheng, Jian Wang
  • Patent number: 11881328
    Abstract: A method and composition for doped HTS tapes having directional flux pinning and critical current.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: January 23, 2024
    Assignees: University of Houston System, SuperPower, Inc.
    Inventors: Venkat Selvamanickam, Yimin Chen
  • Publication number: 20240012192
    Abstract: An anti-peeping backlight module is formed by stacking an upper backlight module, a lower backlight module and a reflecting film disposed below the lower backlight module, wherein the upper backlight module is a transparent module, the lower backlight module is a transparent module or a non-transparent module, the upper backlight module is a collimating backlight module or a diffusion backlight module, the lower backlight module is a collimating backlight module or a diffusion backlight module, and the upper backlight module and the lower backlight module have different properties. The anti-peeping backlight module realizes beam splitting and collimation and can be used as various backlight modules, the beam splitting angle is adjustable, the efficiency is high, and can be controlled independently.
    Type: Application
    Filed: November 9, 2021
    Publication date: January 11, 2024
    Applicant: MAANSHAN-JINGZHI TECHNOLOGY CO LTD
    Inventors: Tong LI, Peng WU, Yimin CHEN
  • Patent number: 11736026
    Abstract: A flyback converter is provided that detects a load-transient-produced increase in the output current to more quickly detect and respond to the load transient.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: August 22, 2023
    Assignee: Dialog Semiconductor Inc.
    Inventors: Mengfei Liu, Yimin Chen, David Nguyen, Juyoung Yoon, Tao Li, Guang Feng, Kai-Wen Chin, Yong Xiong Lin, Jianming Yao
  • Patent number: 11733917
    Abstract: A PCIe architecture is disclosed incorporating a controller memory buffer (CMB). Write data is written to the CMB and is not read out for processing upon receiving a write command for the write data. The data is read out of the CMB and processed to obtain processed data upon receiving feedback from a NAND channel controller. The processed data may be written directly to the NAND channel controller or may be written to a light write buffer that is read by the NAND channel controller. The processed data may be written to a light write buffer functioning as a cut through buffer.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: August 22, 2023
    Assignee: PETAIO INC.
    Inventors: Yimin Chen, Fan Yang
  • Patent number: 11698871
    Abstract: Read latency for a read operation to a host implementing a PRP/SGL buffer is reduced by generating an address table representing the linked-list structure defining the PRP/SGL buffer. The address table may be generated concurrently with reading of data referenced by the read command from a NAND storage device. A block table for tracking status of LBAs referenced by IO commands may include a reference to the address table which is used to transfer LBAs to host memory as soon as the address table is complete and a block of data referenced by an LBA has been read from the NAND storage device.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 11, 2023
    Assignee: PETAIO INC.
    Inventors: Yimin Chen, Fan Yang
  • Patent number: 11621646
    Abstract: A flyback converter is provided that dynamically adjusts a drain threshold voltage for a current cycle of a synchronous rectifier switch transistor based upon operating conditions in a previous cycle of the synchronous rectifier switch transistor. A differential amplifier drives a gate voltage of the synchronous rectifier switch transistor during an on-time of the current cycle so that a drain voltage of the synchronous rectifier switch transistor equals the drain threshold voltage during a regulated portion of the current cycle.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: April 4, 2023
    Assignee: Dialog Semiconductor Inc.
    Inventors: Qingqing Zong, Yimin Chen, Mengfei Liu, Pengju Kong