Patents by Inventor Yi-Min Fu
Yi-Min Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250140770Abstract: An electronic package and a manufacturing method thereof are provided, in which a photonic integrated circuit chip and an electronic integrated circuit chip are disposed on opposite sides of an interposer respectively, and the photonic integrated circuit chip and the electronic integrated circuit chip can accomplish signal connection with each other via a plurality of conductive vias in the interposer directly, thereby reducing the power consumption and transmission delay of the signals transmitted between the circuits.Type: ApplicationFiled: March 27, 2024Publication date: May 1, 2025Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Che-Yu LEE, Chi-Ching HO, Chao-Chiang PU, Yi-Min FU, Po-Yuan SU
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Publication number: 20250140765Abstract: An electronic package and a manufacturing method thereof are provided, in which a plurality of photonic integrated circuit chips and an auxiliary electronic element are separately configured on a package module to shorten the transmission distance of the optical signal. Therefore, the signal transmission rate of a circuit structure can be increased, thereby improving the overall operating performance of the electronic package.Type: ApplicationFiled: April 10, 2024Publication date: May 1, 2025Inventors: Yi-Min FU, Chi-Ching HO, Chao-Chiang PU, Yu-Po WANG
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Publication number: 20250087601Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.Type: ApplicationFiled: November 22, 2024Publication date: March 13, 2025Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Yu-Po WANG, Po-Yuan SU
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Publication number: 20250079254Abstract: An electronic package is provided and includes: a thermally conductive chip; a circuit structure having a circuit layer; and an electronic component disposed between the circuit structure and the thermally conductive chip and electrically connected to the circuit layer, so as to dissipate the heat generated during the operation of the electronic component via the thermally conductive chip. A method of manufacturing the electronic package is further provided.Type: ApplicationFiled: January 4, 2024Publication date: March 6, 2025Inventors: Po-Yuan SU, Chi-Ching HO, Chao-Chiang PU, Yi-Min FU, Che-Yu LEE
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Publication number: 20250038113Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.Type: ApplicationFiled: October 16, 2024Publication date: January 30, 2025Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Yu-Po WANG, Shuai-Lin LIU
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Patent number: 12199047Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.Type: GrantFiled: January 10, 2022Date of Patent: January 14, 2025Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Po-Yuan Su
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Patent number: 12176291Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.Type: GrantFiled: May 10, 2022Date of Patent: December 24, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Shuai-Lin Liu
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Publication number: 20240421026Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is disposed on a carrier structure, a heat conduction layer is formed on the electronic element, and a heat dissipation member having a recess portion is disposed on the heat conduction layer to cover the electronic element. Therefore, the arrangement of the recess portion can buffer the flow of the heat conduction layer to facilitate the formation of an intermetallic structure with sufficient thickness between the heat dissipation member and the electronic element, and the heat dissipation effect of the electronic element can meet expectations.Type: ApplicationFiled: August 11, 2023Publication date: December 19, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chiu-Ling CHEN, Shuai-Lin LIU, Pin-Jing SU, Yi-Min FU, Lung-Yuan WANG
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Publication number: 20240379590Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is disposed on a carrier structure with a circuit layer, a first encapsulating layer and a second encapsulating layer are formed on the carrier structure to cover the electronic element, a first antenna layer is formed on the first encapsulating layer, and a second antenna layer communicatively connected to the first antenna layer is formed on the second encapsulating layer. Therefore, the thickness of the first encapsulating layer is used to control the resonance distance of the antenna frequency so as to generate better resonance effect, and the distance between the first antenna layer and the second antenna layer is controlled by the thickness of the second encapsulating layer to increase the bandwidth of the antenna.Type: ApplicationFiled: August 11, 2023Publication date: November 14, 2024Inventors: Chia-Chu LAI, Yi-Min FU, Chien-Sheng CHEN
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Publication number: 20240371721Abstract: An electronic package and a manufacturing method thereof are provided, in which a heat sink with an opening is disposed on an electronic component of a carrier structure, a heat dissipation material is formed in the opening, and a heat dissipation lid is disposed on the opening to cover the heat dissipation material, such that the problem of insufficient heat dissipation due to the loss of the heat dissipation material can be prevented from occurring to the electronic component.Type: ApplicationFiled: July 27, 2023Publication date: November 7, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yi-Min FU, Chi-Ching HO, Chao-Chiang PU, Yu-Po WANG
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Publication number: 20240363545Abstract: An electronic package and a manufacturing method thereof are provided, in which a full-panel wafer is provided and includes a plurality of electronic bodies arranged in an array at intervals, a plurality of trenches are formed across the electronic bodies along a first direction on the full-panel wafer, so that the trenches on a single electronic body are arranged parallel to each other at interval and along a second direction perpendicular to the first direction. Then, in a singulation process, any trench can be selected for cutting to obtain a plurality of electronic elements of a required size. Finally, each of the electronic elements is disposed on a packaging region of a carrier structure, so that each of the electronic elements is electrically connected to at least a portion of electrical contact pads in the packaging region.Type: ApplicationFiled: July 14, 2023Publication date: October 31, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Che-Yu LEE, Chi-Ching HO, Chao-Chiang PU, Yi-Min FU, Po-Yuan SU
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Publication number: 20240290701Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.Type: ApplicationFiled: April 24, 2024Publication date: August 29, 2024Inventors: Yi-Min FU, Chi-Ching HO, Cheng-Yu KANG, Yu-Po WANG
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Publication number: 20240274519Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.Type: ApplicationFiled: April 23, 2024Publication date: August 15, 2024Inventors: Yi-Min FU, Chi-Ching HO, Cheng-Yu KANG, Yu-Po WANG
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Publication number: 20240264389Abstract: An electronic package and the manufacturing method thereof are provided, in which a photonic element and an electronic element are embedded in an encapsulation layer, and the photonic element has an external contact area exposed from the encapsulation layer, such that signals of the electronic element can be directly transmitted to an optical fiber via the external contact area of the photonic element to achieve the purpose of photoelectric integration.Type: ApplicationFiled: May 2, 2023Publication date: August 8, 2024Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Che-Yu LEE, Po-Yuan SU
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Patent number: 12051641Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.Type: GrantFiled: November 16, 2021Date of Patent: July 30, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yi-Min Fu, Chi-Ching Ho, Cheng-Yu Kang, Yu-Po Wang
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Publication number: 20240153884Abstract: An electronic package is provided, in which a first electronic element and a second electronic element stacked on each other are embedded in a cladding layer, a circuit structure electrically connected to the second electronic element is formed on the cladding layer, and a passive element and a package module are disposed on the circuit structure, so as to shorten the transmission distance of electrical signals between the package module and the second electronic element.Type: ApplicationFiled: December 30, 2022Publication date: May 9, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yi-Min FU, Hung-Kai WANG, Chi-Ching HO, Yih-Jenn JIANG, Yu-Po WANG
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Publication number: 20240038685Abstract: An electronic package is provided and includes an electronic structure and a plurality of conductive pillars embedded in a cladding layer, a circuit structure formed on the cladding layer, and a reinforcing member bonded to a side surface of the cladding layer, where a plurality of electronic elements are disposed on and electrically connected to the circuit structure, such that the electronic structure electrically bridges any two of the electronic elements via the circuit structure, so as to enhance the structural strength of the electronic package and avoid warpage by means of the design of the reinforcing member.Type: ApplicationFiled: September 22, 2022Publication date: February 1, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Fang-Lin Tsai
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Publication number: 20230378072Abstract: An electronic package is provided, in which a plurality of electronic elements are disposed on a plurality of carrier structures, and at least one bridging element is disposed between at least two of the carrier structures to electrically bridge the two carrier structures. Therefore, when there is a need to increase the function of the electronic package, only one electronic element is arranged on a single carrier structure, and there is no need to increase the panel area of the carrier structure, so as to facilitate the control of the panel area of the carrier structure and avoid warpage of the carrier structure due to the oversized panel.Type: ApplicationFiled: July 5, 2022Publication date: November 23, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Shuai-Lin Liu, Nai-Hao Kao, Chao-Chiang Pu, Yi-Min Fu, Yu-Po Wang
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Publication number: 20230282586Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.Type: ApplicationFiled: May 10, 2022Publication date: September 7, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Shuai-Lin Liu
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Publication number: 20230253331Abstract: An electronic package is provided, in which an electronic module and at least one support member are disposed on a substrate structure having a circuit layer, such that the stress on the substrate structure is dispersed through the at least one support member to eliminate the problem of stress concentration and prevent the substrate structure from warping.Type: ApplicationFiled: August 29, 2022Publication date: August 10, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yi-Min Fu, Chi-Ching Ho, Chao-Chiang Pu, Yu-Po Wang