Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.

Abstract: A method of reducing column fixed pattern noise including calibrating a readout circuit, wherein the readout circuit is electrically connected to at least one programmable gain amplifier and an analog-to-digital converter. Calibrating the readout circuit includes electrically disconnecting the readout circuit from a pixel output and electrically connecting a pixel reset input of the readout circuit to a pixel output signal input of the readout circuit. Calibrating the readout circuit further includes comparing a measured output of the readout circuit to a predetermined value and storing the comparison result in a non-transitory computer readable medium. The method further includes operating the readout circuit, the operating the readout circuit includes receiving a pixel sample signal and outputting a calibrated output based on an operating output and the stored comparison result.

Abstract: A CMOS sensor includes a pixel configured to output a voltage based on incident light received by the pixel. A first circuit is coupled to the pixel and is configured to determine a reset voltage of the pixel. A second circuit is coupled to the first circuit and is configured to select a gain level based on the reset voltage of the pixel. A gain circuit is coupled to the second circuit and is configured to set a voltage level of the gain selected by the second circuit.

Abstract: An integrated circuit comprises a semiconductor substrate and a color image sensor array on the substrate. The color image sensor array has a first configuration of color pixels for collecting color image data, and at least one crosstalk test pattern on the substrate proximate the color image sensor array. The crosstalk test pattern includes a plurality of color sensing pixels arranged for making color crosstalk measurements. The test pattern configuration is different from the first configuration.

Abstract: An integrated circuit comprises a semiconductor substrate and a color image sensor array on the substrate. The color image sensor array has a first configuration of color pixels for collecting color image data, and at least one crosstalk test pattern on the substrate proximate the color image sensor array. The crosstalk test pattern includes a plurality of color sensing pixels arranged for making color crosstalk measurements. The test pattern configuration is different from the first configuration.

Abstract: A CMOS image sensor includes a pixel array including a plurality of unit pixels with individual rows of unit pixels being coupled to respective row control signal lines, and a buffer including plural row control signal drivers. Each driver is coupled to a respective one of the row control signal lines and is configured to provide a row control signal pulse to a respective row control signal line in response to an input pulse when the row control signal line is in an active state and to bias the row control signal line at a ground voltage when the respective row control signal line is in an inactive state. Each driver has a first drive capability when the row control signal line is in the active state and a second drive capability greater than the first drive capability when the row control signal line is in an inactive state.

Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes an isolation feature disposed in the substrate. The image sensor further includes a radiation-sensing region disposed in the substrate and adjacent to the isolation feature. The radiation-sensing region is operable to sense radiation projected toward the radiation-sensing region from the back side. The image sensor also includes a transparent conductive layer disposed over the back side of the substrate.

Abstract: An avalanche photodiode is deposited and integrated directly on top of CMOS readout circuitry. The anode of the avalanche photodiode may be independently biased at high voltage so that the avalanche photodiode may be operated in an avalanche multiplication mode. The avalanche photodiode has a multi-layered structure which is not pixilated; and photo-carrier generation and carrier multiplication may take place in the same layer or in different layers. A constant-gate-bias transistor isolates the high-voltage avalanche photodiode from the low-voltage the CMOS readout circuitry.

Abstract: A motherboard for two-users comprised of a control chip with decoding function being integrated to the keyboard and mouse signals control loop of the USB connection ports of the motherboard, and is connected respectively to the redundant pins of the PS2 mouse and the PS2 keyboard connection ports; and the signal cables of the keyboard and the mouse being integrated into a single PS2 keyboard connector and a single PS2 mouse connector with both connectors respectively connected to the PS2 keyboard and the PS2 mouse connection ports of the motherboard for it to allow simultaneous control and operation by two sets of keyboard and mouse.