Abstract: A differential amplification device and a compensation method thereof. The differential amplification device includes a first terminal signal circuit, a second terminal signal circuit and a controller. The first terminal signal circuit and the second terminal signal circuit respectively generate a first terminal signal and a second terminal signal of a differential output signal to a first terminal of a transmission path. The controller adjusts first element parameters of the first terminal signal circuit or second element parameters of the second terminal signal circuit based on a transmitted differential signal at a second terminal of the transmission path to compensate for asymmetric influence by the transmission path on the first terminal signal and the second terminal signal of the transmitted differential signal. Adjustment of the first element parameter of the first terminal signal circuit is independent of adjustment of the second element parameter of the second terminal signal circuit.

Abstract: An audio data processing and transmission system has multiple audio data transmitter devices and an audio data receiver device. The audio data receiver device is communicatively connected to the audio data transmitter devices. The audio data transmitter device acquires a piece of first audio data which has not been performed with digital signal processing and has no functions of the digital signal processing. The audio data receiver device receives multiple pieces of the first audio data transmitted by the audio data transmitter devices, and performs the digital signal processing on the multiple pieces of the first audio data which have not been performed with digital signal processing. The audio data transmitter devices have no digital signal processing circuits, and the work of the digital signal processing is transfer to the audio data receiver device, thus reducing an overall cost of the audio data processing and transmission system.

Abstract: A system on chip (SOC) module has a first SOC for audio data transmission, and the first SOC has an audio data input/output (I/O) interface unit, a processing unit and a serial peripheral interface (SPI) unit. The audio data I/O interface unit is electrically connected to multiple audio input devices so as to receive multiple pieces of first audio data generated by the multiple audio input devices. The processing unit is used to store the multiple pieces of the first audio data. The SPI unit is electrically connected to a second SOC via a first SPI, so as to transmit the multiple pieces of the first audio data to the second SPI.

Abstract: A protection circuit applied in a hub chip including a power pin, a first data pin, and a second data pin is provided. A voltage generation circuit generates and adjusts output voltage according to the voltage of the power pin and the voltage of the first data pin. A PMOS transistor includes a first gate, a first electrode, a second electrode, and a first bulk. The first electrode is coupled to the power pin. The second electrode is coupled to the first data pin. The first bulk receives the output voltage. A detection circuit is coupled to the first gate and detects the voltage of the power pin. In response to the voltage of the power pin being equal to the first voltage, the detection circuit transmits the voltage of the first data pin to the first gate.

Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.

Abstract: A protection circuit applied in a hub chip including a power pin, a first data pin, and a second data pin is provided. A voltage generation circuit generates and adjusts output voltage according to the voltage of the power pin and the voltage of the first data pin. A PMOS transistor includes a first gate, a first electrode, a second electrode, and a first bulk. The first electrode is coupled to the power pin. The second electrode is coupled to the first data pin. The first bulk receives the output voltage. A detection circuit is coupled to the first gate and detects the voltage of the power pin. In response to the voltage of the power pin being equal to the first voltage, the detection circuit transmits the voltage of the first data pin to the first gate.

Abstract: A wireless device having a multi-station mode provided by the present disclosure can act as a client/station. The wireless device has at least one wireless communication transceiver circuit. The wireless communication transceiver circuit makes the wireless device operate in the multi-station mode to link to multiple access point devices of hosts/APs simultaneously, and that is, the wireless device can be used as a work station of the access point devices of hosts/APs. The wireless device of the present disclosure can act as the work station of the access point devices at the same time or in the time-sharing manner, so it solves the technical problem that multiple transmitter devices of WLAN in the prior art cannot be used as the work station of the receiver device and the wireless network router (that is, the technical problem that each of multiple transmitter devices can only link to one access point).

Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.

Abstract: A wireless data transmitting system having a wireless data receiving device and a plurality of wireless data transmitting devices is disclosed. Each of the wireless data transmitting devices transmits data at every a specific period if no collision is detected during data transmission, and if a collision is detected during data transmission, the wireless data transmitting device decides a back-off delay time and transmits data after the back-off delay time has elapsed. The back-off delay time of the wireless data transmitting device is a multiplication of a unit slot time of the wireless data transmitting device transmitting at least one data packet, by k, wherein k is an integer equal to or larger than 1 and is randomly decided by a probability distribution model of the wireless data transmitting device.

Abstract: A wireless data transmitting system having a wireless data receiving device and a plurality of wireless data transmitting devices is disclosed. Each of the wireless data transmitting devices transmits data at every a specific period if no collision is detected during data transmission, and if a collision is detected during data transmission, the wireless data transmitting device decides a back-off delay time and transmits data after the back-off delay time has elapsed. The back-off delay time of the wireless data transmitting device is a multiplication of a unit slot time of the wireless data transmitting device transmitting at least one data packet, by k, wherein k is an integer equal to or larger than 1 and is randomly decided by a probability distribution model of the wireless data transmitting device.

Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.

Abstract: A data conversion circuit for converting black-and-white or grayscale frames for a color display panel/module, and an electronic device and a color display device using the data conversion circuit are disclosed. The data conversion circuit includes a data conversion unit for receiving an input data of the black-and-white or grayscale frame provided by a controller/MCU. The data conversion unit converts the input data into a color frame data for the color display panel/module, and no input clock or reference clock for adjusting an output rate of the color frame data is received or generated by the data conversion circuit.

Abstract: A data conversion circuit for converting black-and-white or grayscale frames for a color display panel/module, and an electronic device and a color display device using the data conversion circuit are disclosed. The data conversion circuit includes a data conversion unit for receiving an input data of the black-and-white or grayscale frame provided by a controller/MCU. The data conversion unit converts the input data into a color frame data for the color display panel/module, and no input clock or reference clock for adjusting an output rate of the color frame data is received or generated by the data conversion circuit.

Abstract: A conversion device for converting black-and-white or grayscale frames for a color display, and an electronic device and a color display device using the conversion device are disclosed. The conversion device includes a plurality of hardware circuits electrically connected to one another for receiving an input data provided by a control circuit. The input data includes a control signal, a string signal, a number signal or a symbol signal and the hardware circuits draw a color frame according to the input data to generate a color frame data for the color display; or alternatively, the input data includes a plurality of pixel signals of a black-and-white or grayscale frame, the hardware circuits convert the input data into a color frame data for the color display, and no input clock or reference clock for adjusting an output rate of the color frame data is received or generated by the conversion device.

Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.

Abstract: A wireless monitoring system includes a wireless monitor using a battery as a power source, a transceiver for receiving an image photographed by the wireless monitor from a remote end, and an image identification unit installed in a cloud server. After a sensor of the wireless monitor is triggered, the photography module starts shooting, and the transceiver transmits the image to the cloud server for identification. If the photographed image is not a target to be monitored, the transceiver will drive the photography module of the wireless monitor to stop shooting, so as to extend the power endurance of the wireless monitor effectively.

Abstract: A wireless transmission system capable of automatically adjusting transmission power includes a main wireless apparatus and plural secondary wireless apparatuses, and the main wireless apparatus is capable of detecting the data rate between the secondary wireless apparatuses, and increasing or decreasing the transmission power of any one of the secondary wireless apparatuses by a master controller, or increasing or decreasing the transmission power of the main wireless apparatus, so that the data rate and/or transmitting distance between the main wireless apparatus and the secondary wireless apparatuses can be optimized.

Abstract: A wireless transmission system capable of automatically adjusting transmission power includes a main wireless apparatus and plural secondary wireless apparatuses, and the main wireless apparatus is capable of detecting the data rate between the secondary wireless apparatuses, and increasing or decreasing the transmission power of any one of the secondary wireless apparatuses by a master controller, or increasing or decreasing the transmission power of the main wireless apparatus, so that the data rate and/or transmitting distance between the main wireless apparatus and the secondary wireless apparatuses can be optimized.

Abstract: A universal serial bus circuit including a power circuit and a terminating circuit is provided. The power circuit provides a differential signal. The terminating circuit is coupled to the power circuit. The terminating circuit receives the differential signal through the first signal output terminal and the second signal output terminal, and the terminating circuit includes a first load circuit and a second load circuit. When the universal serial bus circuit is operated in a handshake mode, the terminating circuit receives the differential signal through the first load circuit and the second load circuit, and outputs a pulse signal through the first signal output terminal and the second signal output terminal. When the universal serial bus circuit is operated in a normal mode, the terminating circuit receives the differential signal through the first load circuit, and outputs a data signal through the first signal output terminal and the second signal output terminal.

Abstract: Aspects of the disclosure provide a method for packet header compression. The method can include receiving a packet in a communication device having resources for packet compression, parsing a header of the packet to obtain header information, and determining whether to compress the header of the packet based on the header information and status of the resources for packet compression in the communication device.