Patents by Inventor Yi Wei

Yi Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12161682
    Abstract: The present invention provides a topical composition having a fermented product of lactic acid bacteria synbiotics as an active ingredient. The fermented product of lactic acid bacteria synbiotics is obtained by performing a fermenting step with lactic acid bacteria and a deactivating step on a fermenting substrate. The lactic acid bacteria are consisting of Lactobacillus salivarius subsp. salicinius AP-32, Bifidobacterium animalis subsp. lactis CP-9 and Lactobacillus acidophilus TYCA06. The fermenting substrate includes animal protein, plant protein and/or plant extracts. The aforementioned fermented product of lactic acid bacteria synbiotics can effectively inhibit the growth of Staphylococcus aureus and/or Propionibacterium acnes, and can be used in the topical composition.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: December 10, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Yi-Wei Kuo, Ching-Wei Chen, Yu-Fen Huang, Jia-Hung Lin
  • Publication number: 20240401770
    Abstract: An illuminating device including a light-emitting element array and a plurality of light-diffusing elements is provided. The light-emitting element array includes a plurality of discrete light-emitting areas. The plurality of light-diffusing elements respectively correspond to the light-emitting areas, and each light-diffusing element includes a light-entering surface and a light-exiting surface. The light beams emitted by the light-emitting areas respectively enter the corresponding light-diffusing element via the corresponding light-entering surface. After the light beams respectively leave the corresponding light-diffusing element via the corresponding light-exiting surface, the light beams respectively form a plurality of illumination beams. The illumination beams appear in an array form for illumination.
    Type: Application
    Filed: January 3, 2024
    Publication date: December 5, 2024
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Yi-Wei Liu, Yi-Chih Lai
  • Patent number: 12158707
    Abstract: Particulate deposition rate on a photolithographic mask, particularly of tin (Sn) particles produced within an EUV light source, is reduced by producing turbulence within a radiation source chamber of the EUV light source. Turbulence can be produced by changing the temperature, pressure, and/or gas flow rate within the radiation source chamber. The turbulence reduces the number of particles exiting the EUV light source which could be deposited on the photomask.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: December 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui-Chieh Chen, Yi-Wei Lee
  • Patent number: 12154608
    Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bo-Jhih Shen, Kuang-I Liu, Joung-Wei Liou, Jinn-Kwei Liang, Yi-Wei Chiu, Chin-Hsing Lin, Li-Te Hsu, Han-Ting Tsai, Cheng-Yi Wu, Shih-Ho Lin
  • Publication number: 20240377615
    Abstract: An imaging lens, sequentially including a first lens element to a seventh lens element from an object side to an image side along an optical axis, is provided. The first lens element has positive refracting power. The second lens element has negative refracting power. The third lens element and the fourth lens element form a cemented lens element, and the cemented lens element has positive refracting power. The fifth lens element has positive refracting power. The sixth lens element has positive refracting power. The seventh lens element has negative refracting power.
    Type: Application
    Filed: January 2, 2024
    Publication date: November 14, 2024
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventor: Yi-Wei Liu
  • Publication number: 20240378825
    Abstract: The present application discloses an information interaction method, device, apparatus and medium based on augmented reality. The information interaction method includes: generating first interactive data in response to an interactive operation of a first virtual target in a virtual reality space, and sending the first interactive data to a first server terminal; receiving second interactive data corresponding to a second virtual target sent by the first server terminal, wherein the second virtual target and the first virtual target share the virtual reality space; and calling a physical engine to render the interactive operations of the first virtual target and the second virtual target in the virtual reality space based on the first interactive data and the second interactive data, and generating and displaying an interactive rendering result.
    Type: Application
    Filed: September 21, 2022
    Publication date: November 14, 2024
    Inventors: Linsen GAO, Xiaofeng LI, Yi WEI, Jiacheng LIU, Yuhong ZHANG
  • Publication number: 20240371870
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in a substrate, the first semiconductor fin adjacent the second semiconductor fin, forming a dummy gate structure extending over the first semiconductor fin and the second semiconductor fin, depositing a first dielectric material surrounding the dummy gate structure, replacing the dummy gate structure with a first metal gate structure, performing an etching process on the first metal gate structure and on the first dielectric material to form a first recess in the first metal gate structure and a second recess in the first dielectric material, wherein the first recess extends into the substrate, and wherein the second recess is disposed between the first semiconductor fin and the second semiconductor fin, and depositing a second dielectric material within the first recess.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Jen-Chih Hsueh, Chih-Chang Hung, Tsung Fan Yin, Yi-Wei Chiu
  • Publication number: 20240363336
    Abstract: Methods to form low-k dielectric materials for use as intermetal dielectrics in multilevel interconnect systems, along with their chemical and physical properties, are provided. The deposition techniques described include PECVD, PEALD, and ALD processes where the precursors such as TEOS and MDEOS may provide the requisite O-atoms and O2 gas may not be used as one of the reactants. The deposition techniques described further include PECVD, PEALD, and ALD processes where O2 gas may be used and, along with the O2 gas, precursors containing embedded Si—O—Si bonds, such as (CH3O)3—Si—O—Si—(CH3O)3) and (CH3)3—Si—O—Si—(CH3)3 may be used.
    Type: Application
    Filed: July 12, 2024
    Publication date: October 31, 2024
    Inventors: Joung-Wei Liou, Yu Lun Ke, Yi-Wei Chiu
  • Publication number: 20240363409
    Abstract: A method includes forming an ILD to cover a gate stack of a transistor. The ILD and the gate stack are parts of a wafer. The ILD is etched to form a contact opening, and a source/drain region of the transistor or a gate electrode in the gate stack is exposed through the contact opening. A conductive capping layer is formed to extend into the contact opening. A metal-containing material is plated on the conductive capping layer in a plating solution using electrochemical plating. The metal-containing material has a portion filling the contact opening. The plating solution has a sulfur content lower than about 100 ppm. A planarization is performed on the wafer to remove excess portions of the metal-containing material. A remaining portion of the metal-containing material and a remaining portion of the conductive capping layer in combination form a contact plug.
    Type: Application
    Filed: July 12, 2024
    Publication date: October 31, 2024
    Inventors: Yu-Sheng Wang, Chi-Cheng Hung, Chen-Yuan Kao, Yi-Wei Chiu, Liang-Yueh Ou Yang, Yueh-Ching Pai
  • Publication number: 20240365133
    Abstract: A wireless node device includes a neural network module, a wireless network communication circuit, and a control circuit. The neural network module has a plurality of trained parameters. The control circuit is coupled to the neural network module and the wireless network communication circuit. The control circuit obtains, from the wireless network communication circuit, a plurality of current state data corresponding to a plurality of time points, and loads the neural network module to obtain estimated network data based on the current state data. The control circuit controls the wireless network communication circuit according to the estimated network data.
    Type: Application
    Filed: April 27, 2023
    Publication date: October 31, 2024
    Inventor: Yi-Wei CHEN
  • Patent number: 12133474
    Abstract: A method of fabricating magnetoresistive random access memory, including providing a substrate, forming a bottom electrode layer, a magnetic tunnel junction stack, a top electrode layer and a hard mask layer sequentially on the substrate, wherein a material of the top electrode layer is titanium nitride, a material of the hard mask layer is tantalum or tantalum nitride, and a percentage of nitrogen in the titanium nitride gradually decreases from a top surface of top electrode layer to a bottom surface of top electrode layer, and patterning the bottom electrode layer, the magnetic tunnel junction stack, the top electrode layer and the hard mask layer into multiple magnetoresistive random access memory cells.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: October 29, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, Jing-Yin Jhang, I-Ming Tseng, Yu-Ping Wang, Chien-Ting Lin, Kun-Chen Ho, Yi-Syun Chou, Chang-Min Li, Yi-Wei Tseng, Yu-Tsung Lai, Jun Xie
  • Publication number: 20240346602
    Abstract: A sequence of data entry screens are configured to collect the data from a user. The method and system receive data entered by a user into a data entry screen. The method and system then determine metrics of the collected data, and ranks the collected data and the data entry screens based on the determined metrics. The ranking is then used to display the next best screen in the sequence for collecting data.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 17, 2024
    Applicant: INTUIT INC.
    Inventors: Apoorva BANUBAKODE, Na XU, Mohsen SAMADANI, Yi WEI, Deepankar MOHAPATRA, Conrad DE PEUTER
  • Publication number: 20240349493
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Application
    Filed: June 26, 2024
    Publication date: October 17, 2024
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Patent number: 12120812
    Abstract: A circuit board includes a dielectric substrate, a signal line and a pair of ground wires. The dielectric substrate includes a base and an elevated platform protruding from an upper surface of the base. The signal line is conformally disposed on the dielectric substrate and includes a first segment disposed on an upper surface of the elevated platform, a second segment extending on the upper surface of the base, and a third segment disposed on a sidewall of the elevated platform and connecting the first segment and the second segment. The pair of ground wires are disposed on the dielectric substrate and are spaced apart from the signal line. A projection of the second segment of the signal line on the upper surface of the base partly overlaps projections of the pair of ground wires on the upper surface of the base.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: October 15, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangdao) Co., Ltd, Avary Holding (Shenzhen) Co., Ltd., Garuda Technology Co., Ltd.
    Inventors: Hao-Yi Wei, Childe Zhu, Yan-Lu Li
  • Patent number: 12113893
    Abstract: This disclosure relates to techniques for performing encryption and decryption operations and that provide fully non-custodial data management, i.e., where end-users have control over their data—rather than a third party. Specifically, the techniques disclosed herein are configured to allow end-users to have the ability to recover and/or maintain access to data stored on third-party systems—even if one or more third-party entities storing the data are no longer in compliance with a predetermined set of operational criteria. In other implementations, novel split private key generation techniques are disclosed, wherein a newly-generated private key may be split into at least three shards, e.g., an authentication service provider shard, a shard for another entity, and a “recovery” shard. In still other implementations, an iFrame may decrypt separate shards of a private key using a delegated key management system (DKMS) and then use the reconstructed private key to sign a digital transaction.
    Type: Grant
    Filed: February 16, 2024
    Date of Patent: October 8, 2024
    Assignee: Magic Labs, Inc.
    Inventors: Fei-Yang Jen, Yi Wei Chen, Dheeban Srinivasan Govindarajan, Jaemin Jin, Shang Li
  • Publication number: 20240331103
    Abstract: This application relates to the technical field of images, and provides a method for training a light filling model, an image processing method, and a related device thereof. The method includes: obtain an albedo portrait training image and a normal portrait training image; performing processing on the refined matte portrait training image, the plurality of frames of OLAT training images, and a panoramic environment image to obtain a to-be-light-filled composite rendered image and a light-filled composite rendered image; and training an initial light filling model by using the albedo portrait training image, the normal portrait training image, the to-be-light-filled composite rendered image, and the light-filled composite rendering image, to obtain a target light filling model. In this application, by using a deep learning method, a portrait and an environment in a to-be-photographed scene are filled with light to improve sharpness and contrast of the portrait.
    Type: Application
    Filed: December 28, 2022
    Publication date: October 3, 2024
    Inventors: Yi WEI, Liu LU
  • Publication number: 20240328587
    Abstract: A lamp including a light emitting module having a base substrate with a mounting surface, a plurality of white-light emitting elements disposed on the mounting surface in a circular arrangement with a central axis extending from a center thereof, an elongated support structure extending longitudinally along the central axis from the mounting surface, and at least one row of red-green-blue-light emitting elements distributed along the elongated support structure lengthwise. The lamp further including a light diffuser cover placed over the plurality of white-light emitting elements with the elongated support structure inserted therethrough, and a hollow lamp shade fitted over the light emitting module to surround the elongated support structure with a base opening of the hollow lamp shade interfacing the base substrate, wherein a rim of the base opening encircle the plurality of white-light emitting elements capable of illuminating the hollow lamp shade from the base opening.
    Type: Application
    Filed: September 8, 2021
    Publication date: October 3, 2024
    Applicant: Razer (ASIA-PACIFIC) PTE LTD.
    Inventors: Farrukh Raza RIZVI, Wooi Liang CHIN, Yi Wei LIM
  • Patent number: 12107202
    Abstract: An electronic device, including an active device substrate, an insulation film, a vertical wire, and an anisotropic conductive adhesive, is provided. The active device substrate includes a substrate, a first wire, and a second wire. The first wire is configured on a first surface of the substrate, the second wire is configured on a second surface of the substrate, and a side surface connects the first surface to the second surface that is opposite to the first surface. The insulation film is configured on the side surface of the substrate. The vertical wire is configured on a surface of the insulation film and is located between the insulation film and the side surface of the substrate. The anisotropic conductive adhesive is configured between the vertical wire and the side surface of the substrate and electrically connects the vertical wire to the first wire and the second wire.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: October 1, 2024
    Assignee: Au Optronics Corporation
    Inventors: Hsin-Hung Sung, Yi-Wei Chen
  • Patent number: 12106599
    Abstract: An image sensor for imaging fingerprints has multiple photodiode groups each with field of view through a microlens determined by optical characteristics of the microlens and locations of the microlens and openings of upper and lower mask layers. Many photodiode groups have fields of view outwardly splayed from a center-direct field of view. A diameter of openings of the upper mask layer distant from the group having a center-direct field of view is larger than openings of a photodiode group having a center-direct field of view. A method of matching illumination of a group of photodiodes with center-direct field of view to illumination of photodiode groups having outwardly splayed fields of view includes sizing openings in the upper mask layer of photodiode groups with outwardly splayed fields of view larger than openings in the upper mask layer associated with photodiode groups having center-direct field of view.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: October 1, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jau-Jan Deng, Yi-Wei Liu
  • Patent number: D1050584
    Type: Grant
    Filed: July 18, 2024
    Date of Patent: November 5, 2024
    Inventor: Yi Wei