Patents by Inventor Yih-Der Guo

Yih-Der Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210091265
    Abstract: A light-emitting device including an epitaxial layer, a support layer, an insulating layer, a first electrode pad, and a second electrode pad is provided. The epitaxial layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer, wherein the light-emitting layer is disposed on a partial area of the first type doped semiconductor layer and is between the first type doped semiconductor layer and the second type doped semiconductor layer. The support layer covers the second type doped semiconductor layer while the insulating layer covers the epitaxial layer and the support layer. The first and the second electrode pads are disposed over the insulating layer and electrically connected to the first and the second type doped semiconductor layers, respectively. The support layer extends from a first position below the first electrode pad to a second position below the second electrode pad.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Ming-Hsien Wu, Yi-Chen Lin, Yao-Jun Tsai, Yen-Hsiang Fang
  • Publication number: 20210057611
    Abstract: A light-emitting device including an epitaxial layer, a support layer, an insulating layer, a first electrode pad, and a second electrode pad is provided. The epitaxial layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer, wherein the light-emitting layer is disposed on a partial area of the first type doped semiconductor layer and is between the first type doped semiconductor layer and the second type doped semiconductor layer. The support layer covers the second type doped semiconductor layer while the insulating layer covers the epitaxial layer and the support layer. The first and the second electrode pads are disposed over the insulating layer and electrically connected to the first and the second type doped semiconductor layers, respectively. The support layer extends from a first position below the first electrode pad to a second position below the second electrode pad.
    Type: Application
    Filed: December 24, 2019
    Publication date: February 25, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Ming-Hsien Wu, Yi-Chen Lin, Yao-Jun Tsai, Yen-Hsiang Fang
  • Patent number: 10431483
    Abstract: A transfer support adapted to contact a plurality of elements is provided. The transfer support has a first surface, a second surface opposite to the first surface, a recess located on the second surface, a plurality of platforms protruded from the first surface, a plurality of supporting pillars distributed in the recess and a plurality of through holes. The platforms have carry surfaces adapted to contact the plurality of elements. The through holes extend from the carry surfaces of the platforms to the recess, and two of the adjacent supporting pillars are spaced apart from each other to form an air passage. In addition, a transfer module is also provided.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: October 1, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yih-Der Guo, Yen-Hsiang Fang, Yao-Jun Tsai, Yi-Chen Lin
  • Publication number: 20190019718
    Abstract: A transfer support adapted to contact a plurality of elements is provided. The transfer support has a first surface, a second surface opposite to the first surface, a recess located on the second surface, a plurality of platforms protruded from the first surface, a plurality of supporting pillars distributed in the recess and a plurality of through holes. The platforms have carry surfaces adapted to contact the plurality of elements. The through holes extend from the carry surfaces of the platforms to the recess, and two of the adjacent supporting pillars are spaced apart from each other to form an air passage. In addition, a transfer module is also provided.
    Type: Application
    Filed: July 3, 2018
    Publication date: January 17, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yih-Der Guo, Yen-Hsiang Fang, Yao-Jun Tsai, Yi-Chen Lin
  • Publication number: 20190019702
    Abstract: A transfer support adapted to contact a plurality of elements is provided. The transfer support has a first surface, a second surface opposite to the first surface, a recess located on the second surface, a plurality of platforms protruded from the first surface, a plurality of supporting pillars distributed in the recess and a plurality of through holes. The platforms have carry surfaces adapted to contact the plurality of elements. The through holes extend from the carry surfaces of the platforms to the recess, and two of the adjacent supporting pillars are spaced apart from each other to form an air passage. In addition, a transfer module is also provided.
    Type: Application
    Filed: December 20, 2017
    Publication date: January 17, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yih-Der Guo, Yen-Hsiang Fang, Yao-Jun Tsai, Yi-Chen Lin
  • Publication number: 20150171274
    Abstract: The present disclosure provides a LED structure which comprises an epitaxial layer, a current dispatching layer, a first electrode layer, and a second electrode layer. The epitaxial layer comprises sequentially disposed a high resistance buffer layer, a first GaN layer, an active layer, and a second GaN layer. A plurality of recesses are formed on a first surface of the epitaxial layer, each of the recesses has an opening on the first surface, penetrates the high resistance buffer layer, and contacts the first GaN layer. The current dispatching layer is disposed on the first surface of the epitaxial layer, and is disposed into the recesses for contacting the first GaN layer. The first electrode layer is disposed on the current dispatching layer, and the second electrode layer is disposed on a second surface of the epitaxial layer.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 18, 2015
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der GUO, Yu-Hsiang CHANG, Kun-Fong LIN
  • Patent number: 8674393
    Abstract: A substrate structure is described, including a starting substrate, crystal piers on the starting substrate, and a mask layer. The mask layer covers an upper portion of the sidewall of each crystal pier, is connected between the crystal piers at its bottom, and is separated from the starting substrate by an empty space between the crystal piers. An epitaxial substrate structure is also described, which can be formed by growing an epitaxial layer over the above substrate structure form the crystal piers. The crystal piers may be broken after the epitaxial layer is grown.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: March 18, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Chu-Li Chao, Yen-Hsiang Fang, Ruey-Chyn Yeh, Kun-Fong Lin
  • Patent number: 8647901
    Abstract: There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: February 11, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Chih-Ming Lai, Jenq-Dar Tsay, Po-Chun Liu
  • Patent number: 8604487
    Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes a base material, a patterned nitride semiconductor, a protection layer, and a nitride semiconductor layer. The patterned nitride semiconductor layer is located on the base material and includes a plurality of nanorod structures and a plurality of block patterns, and an upper surface of the nanorod structures is substantially coplanar with an upper surface of the block patterns. The protection layer covers a side wall of the nanorod structure sand a side wall of the block patterns. The nitride semiconductor layer is located on the patterned nitride semiconductor layer, and a plurality of nanopores are located between the nitride semiconductor layer and the patterned nitride semiconductor layer.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: December 10, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Yen-Hsiang Fang, Chu-Li Chao, Chih-Wei Hu, Yih-Der Guo
  • Patent number: 8502190
    Abstract: A LED device is provided. The LED device has a conductive carrier substrate, a light-emitting structure, a plurality of pillar structures, a dielectric layer, a first electrode and a second electrode. The light-emitting structure is located on the conductive carrier substrate. The pillar structures are located on the light-emitting structure. The dielectric layer is to cover a sidewall of the pillar structure. The first electrode is located over the pillar structure, and the second electrode is located on the conductive carrier substrate.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: August 6, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Chun Liu, Chu-Li Chao, Yih-Der Guo
  • Patent number: 8221547
    Abstract: An initial substrate structure for forming a nitride semiconductor substrate is provided. The initial substrate structure includes a substrate, a patterned epitaxial layer, and a mask layer. The patterned epitaxial layer is located on the substrate and is formed by a plurality of pillars. The mask layer is located over the substrate and covers a part of the patterned epitaxial layer. The mask layer includes a plurality of sticks and there is a space between the sticks. The space exposes a portion of an upper surface of the patterned epitaxial layer.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: July 17, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Chun Liu, Yih-Der Guo, Tung-Wei Chi, Chu-Li Chao
  • Publication number: 20120161148
    Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes a base material, a patterned nitride semiconductor, a protection layer, and a nitride semiconductor layer. The patterned nitride semiconductor layer is located on the base material and includes a plurality of nanorod structures and a plurality of block patterns, and an upper surface of the nanorod structures is substantially coplanar with an upper surface of the block patterns. The protection layer covers a side wall of the nanorod structure sand a side wall of the block patterns. The nitride semiconductor layer is located on the patterned nitride semiconductor layer, and a plurality of nanopores are located between the nitride semiconductor layer and the patterned nitride semiconductor layer.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 28, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Chu-Li Chao, Chih-Wei Hu, Yih-Der Guo
  • Publication number: 20120153338
    Abstract: A substrate structure is described, including a starting substrate, crystal piers on the starting substrate, and a mask layer. The mask layer covers an upper portion of the sidewall of each crystal pier, is connected between the crystal piers at its bottom, and is separated from the starting substrate by an empty space between the crystal piers. An epitaxial substrate structure is also described, which can be formed by growing an epitaxial layer over the above substrate structure form the crystal piers. The crystal piers may be broken after the epitaxial layer is grown.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yih-Der Guo, Chu-Li Chao, Yen-Hsiang Fang, Ruey-Chyn Yeh, Kun-Fong Lin
  • Patent number: 8188573
    Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: May 29, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Suh-Fang Lin, Wei-Hung Kuo
  • Publication number: 20120119220
    Abstract: A nitride semiconductor substrate includes an epitaxy substrate, a patterned nitride semiconductor pillar layer, a nitride semiconductor layer, and a mask layer is provided. The nitride semiconductor pillar layer includes a plurality of first patterned arranged hollow structures and a plurality of second patterned arranged hollow structures formed among the first patterned arranged hollow structures. The second patterned arranged hollow structures have nano dimensions. The nitride semiconductor pillar layer is formed on the epitaxy substrate, and the nitride semiconductor layer is formed on the nitride semiconductor pillar layer. The mask layer covers surfaces of the nitride semiconductor pillar layer and the epitaxy substrate.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 17, 2012
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Suh-Fang Lin, Wei-Hung Kuo, Po-Chun Liu, Tung-Wei Chi, Chu-Li Chao, Jenq-Dar Tsay
  • Patent number: 8173456
    Abstract: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: May 8, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Jenq-Dar Tsay, Suh-Fang Lin, Yu-Hsiang Chang, Yih-Der Guo, Sheng-Huei Kuo, Wei-Hung Kuo, Hsun-Chih Liu
  • Publication number: 20120074383
    Abstract: A LED device is provided. The LED device has a conductive carrier substrate, a light-emitting structure, a plurality of pillar structures, a dielectric layer, a first electrode and a second electrode. The light-emitting structure is located on the conductive carrier substrate. The pillar structures are located on the light-emitting structure. The dielectric layer is to cover a sidewall of the pillar structure. The first electrode is located over the pillar structure, and the second electrode is located on the conductive carrier substrate.
    Type: Application
    Filed: December 1, 2011
    Publication date: March 29, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Chun Liu, Chu-Li Chao, Yih-Der Guo
  • Patent number: 8093081
    Abstract: A device of a light-emitting diode and a method for fabricating the same are provided. The LED device is made by forming a patterned epitaxial layer, a light-emitting structure, etc., on a substrate. In a subsequent process, the patterned epitaxial layer serves as a weakened structure, and can be automatically broken and a rough surface is thus formed. The weakened structure is formed with a specified height, and has pillar structures. The light-emitting structure is formed on the weakened structure. During a cooling process at room temperature, the weakened structure is automatically broken and a rough surface is thus formed.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: January 10, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Chun Liu, Chu-Li Chao, Yih-Der Guo
  • Patent number: 8058705
    Abstract: A composite material substrate having patterned structure includes a substrate, a first dielectric layer, a second dielectric layer, and a nitride semiconductor material. Herein, the first dielectric layer is stacked on the substrate, the second dielectric layer is stacked on the first dielectric layer, and the nitride semiconductor material is stacked on the second dielectric layer and is characterized by a plurality of patterns thereon.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: November 15, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Chun Liu, Wen-Yueh Liu, Chih-Ming Lai, Yih-Der Guo, Jenq-Dar Tsay
  • Patent number: 7868346
    Abstract: An island submount used for carrying at least one light-emitting element having at least one electrical contact. The island submount includes a substrate, at least one island structure having a top surface and an inclined surface, and a conductive layer. The island structure is located on the substrate and corresponds to the electrical contact. The conductive layer is formed on the surface of the island structure and at least covers the top surface, so as to be electrically connected with the electrical contact. The island submount is capable of enhancing the light extraction efficiency of the light-emitting element, and avoids the energy loss due to re-absorption when the light emerging from below the light-emitting element is reflected back to the light-emitting element.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: January 11, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Jenq-Dar Tsay, Po-Chun Liu