Patents by Inventor Yihwan Kim
Yihwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11322583Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.Type: GrantFiled: March 17, 2020Date of Patent: May 3, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Sungkeun Lim, Unki Kim, Yuyeong Jo, Yihwan Kim, Jinbum Kim, Pankwi Park, Ilgyou Shin, Seunghun Lee
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Publication number: 20220052187Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.Type: ApplicationFiled: October 29, 2021Publication date: February 17, 2022Inventors: Dong Chan SUH, Sangmoon LEE, Yihwan KIM, Woo Bin SONG, Dongsuk SHIN, Seung Ryul LEE
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Patent number: 11171224Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.Type: GrantFiled: June 2, 2020Date of Patent: November 9, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong Chan Suh, Sangmoon Lee, Yihwan Kim, Woo Bin Song, Dongsuk Shin, Seung Ryul Lee
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Publication number: 20200373385Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.Type: ApplicationFiled: March 17, 2020Publication date: November 26, 2020Inventors: Sungkeun Lim, Unki Kim, Yuyeong Jo, Yihwan Kim, Jinbum Kim, Pankwi Park, Ilgyou Shin, Seunghun Lee
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Publication number: 20200303523Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.Type: ApplicationFiled: June 2, 2020Publication date: September 24, 2020Inventors: Dong Chan SUH, Sangmoon LEE, Yihwan KIM, Woo Bin SONG, Dongsuk SHIN, Seung Ryul LEE
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Patent number: 10731272Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support including a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: GrantFiled: February 22, 2019Date of Patent: August 4, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Nyi O. Myo, Kevin Bautista, Zhiyuan Ye, Schubert S. Chu, Yihwan Kim
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Patent number: 10692993Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.Type: GrantFiled: April 18, 2018Date of Patent: June 23, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong Chan Suh, Sangmoon Lee, Yihwan Kim, Woo Bin Song, Dongsuk Shin, Seung Ryul Lee
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Publication number: 20190257000Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support including a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: ApplicationFiled: February 22, 2019Publication date: August 22, 2019Inventors: NYI O. MYO, KEVIN BAUTISTA, ZHIYUAN YE, SCHUBERT S. CHU, YIHWAN KIM
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Patent number: 10304834Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate; an active pattern spaced apart from the substrate and extending in a first direction; and a gate structure on the active pattern and extending in a second direction crossing the first direction, wherein a lower portion of the active pattern extends in the first direction and includes a first lower surface that is sloped with respect to an upper surface of the substrate.Type: GrantFiled: March 29, 2018Date of Patent: May 28, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sangmoon Lee, Jungtaek Kim, Yihwan Kim, Woo Bin Song, Dongsuk Shin, Seung Ryul Lee
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Patent number: 10260164Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: GrantFiled: May 15, 2017Date of Patent: April 16, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Nyi O. Myo, Kevin Bautista, Zhiyuan Ye, Schubert S. Chu, Yihwan Kim
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Publication number: 20190081160Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.Type: ApplicationFiled: April 18, 2018Publication date: March 14, 2019Inventors: Dong Chan SUH, Sangmoon LEE, Yihwan KIM, Woo Bin SONG, Dongsuk SHIN, Seung Ryul LEE
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Publication number: 20190067285Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate; an active pattern spaced apart from the substrate and extending in a first direction; and a gate structure on the active pattern and extending in a second direction crossing the first direction, wherein a lower portion of the active pattern extends in the first direction and includes a first lower surface that is sloped with respect to an upper surface of the substrate.Type: ApplicationFiled: March 29, 2018Publication date: February 28, 2019Inventors: Sangmoon LEE, Jungtaek KIM, Yihwan KIM, Woo Bin SONG, Dongsuk SHIN, Seung Ryul LEE
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Patent number: 10208401Abstract: Disclosed is a substrate treating apparatus comprising a wafer chuck on which a substrate is placed, an injector unit on a side of the wafer chuck and injecting process gases that include a first gas and a second gas, and a gas supply unit supplying the process gases to the injector unit. The gas supply unit comprises first and second gas supply sources that respectively accommodate the first and second gases, first and second gas supply lines that respectively connect the first and second gas supply sources to the injector unit, and first and second heating units that are respectively disposed on the first and second gas supply lines. The first heating units disposed on the first gas supply line have a density per unit length greater than the density per unit length of the second heating units disposed on the second gas supply line.Type: GrantFiled: July 31, 2017Date of Patent: February 19, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Keum Seok Park, Sunjung Kim, Yihwan Kim
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Publication number: 20180266017Abstract: Disclosed is a substrate treating apparatus comprising a wafer chuck on which a substrate is placed, an injector unit on a side of the wafer chuck and injecting process gases that include a first gas and a second gas, and a gas supply unit supplying the process gases to the injector unit. The gas supply unit comprises first and second gas supply sources that respectively accommodate the first and second gases, first and second gas supply lines that respectively connect the first and second gas supply sources to the injector unit, and first and second heating units that are respectively disposed on the first and second gas supply lines. The first heating units disposed on the first gas supply line have a density per unit length greater than the density per unit length of the second heating units disposed on the second gas supply line.Type: ApplicationFiled: July 31, 2017Publication date: September 20, 2018Inventors: KEUM SEOK PARK, SUNJUNG KIM, YIHWAN KIM
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Publication number: 20170314158Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: ApplicationFiled: May 15, 2017Publication date: November 2, 2017Inventors: NYI O. MYO, KEVIN BAUTISTA, ZHIYUAN YE, SCHUBERT S. CHU, YIHWAN KIM
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Patent number: 9805942Abstract: Methods for forming semiconductor devices, such as FinFETs, are provided. An epitaxial film is formed over a semiconductor fin, and the epitaxial film includes a top surface having two facets. A cap layer is deposited on the top surface, and portions of the epitaxial film in a lateral direction are removed. Having a smaller lateral dimension prevents the epitaxial film from merging with an adjacent epitaxial film and creates a gap between the epitaxial film and the adjacent epitaxial film.Type: GrantFiled: December 19, 2016Date of Patent: October 31, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Yihwan Kim, Xuebin Li, Abhishek Dube
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Patent number: 9721792Abstract: Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top. Whereas conventionally formed buffer layers are often thick, rough and/or defective, the strain relaxed buffer layers formed using the implementations described herein demonstrate improved surface morphology with minimal defects.Type: GrantFiled: August 21, 2014Date of Patent: August 1, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Yi-Chiau Huang, Yihwan Kim
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Patent number: 9704708Abstract: A method for forming a film on a substrate is provided. The method includes positioning a substrate within a processing volume of a process chamber and heating the substrate. The method further includes forming a semiconductor film on the substrate by exposing the substrate to two or more reactants including a silicon source and a halogenated dopant source. The semiconductor film includes one or more epitaxial regions and one or more non-epitaxial regions.Type: GrantFiled: July 9, 2015Date of Patent: July 11, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Abhishek Dube, Yihwan Kim, Xuebin Li
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Patent number: 9673277Abstract: A method of forming a semiconductor device includes: forming a superlattice structure atop the top surface of a substrate, wherein the superlattice structure comprises a plurality of first layers and a corresponding plurality of second layers alternatingly arranged in a plurality of stacked pairs; forming a lateral etch stop layer by epitaxial deposition of a material of the first layer or the second layer of the superlattice structure atop a sidewall of the superlattice structure, or by selectively oxidizing edges of the first layers and second layers of the superlattice structure; subsequently forming a source region adjacent a first end of the superlattice structure and a drain region adjacent a second opposing end of the superlattice structure; and selectively etching the superlattice structure to remove each of the first layers or each of the second layers to form a plurality of voids in the superlattice structure.Type: GrantFiled: October 16, 2015Date of Patent: June 6, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Adam Brand, Bingxi Sun Wood, Naomi Yoshida, Lin Dong, Shiyu Sun, Chi-Nung Ni, Yihwan Kim
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Patent number: 9650726Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: GrantFiled: February 16, 2011Date of Patent: May 16, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Nyi O. Myo, Kevin Bautista, Zhiyuan Ye, Schubert S. Chu, Yihwan Kim