Abstract: A multi-chip package is disclosed that has a construction capable of preventing and/or reducing electrical shorts caused by shifts in bond wires. The multi-chip package includes a die attach formed between connection points of a bond wire. The die attach is made of a non-conductive material and can be constructed so as to support or encompass a portion of the bond wire. By contacting the bond wire, the die attach restricts the motion of the bond wire by acting as a physical barrier to the bond wire's movement and/or as a source of friction. In this manner, undesired position shifts of the bond wires can be prevented, reducing device failures and allowing for improved manufacturing allowances.

Abstract: Wire bonds are formed at an integrated circuit device so that multiple wires are bonded to a single bond pad. In a particular embodiment, the multiple wires are bonded by first applying a stud bump to the pad and successively bonding each of the wires to the stud bump. Another stud bump can be placed over the bonded wires to provide additional connection security.

Abstract: A multi-chip package is disclosed that has a construction capable of preventing and/or reducing electrical shorts caused by shifts in bond wires. The multi-chip package includes a die attach formed between connection points of a bond wire. The die attach is made of a non-conductive material and can be constructed so as to support or encompass a portion of the bond wire. By contacting the bond wire, the die attach restricts the motion of the bond wire by acting as a physical barrier to the bond wire's movement and/or as a source of friction. In this manner, undesired position shifts of the bond wires can be prevented, reducing device failures and allowing for improved manufacturing allowances.

Abstract: A multi-chip module and a method for manufacturing the multi-chip module that mitigates wire breakage. A first semiconductor chip is mounted and wirebonded to a support substrate. A spacer is coupled to the first semiconductor chip. A support material is disposed on the spacer and a second semiconductor chip is positioned on the support material. The second semiconductor chip is pressed into the support material squeezing it into a region adjacent the spacer and between the first and second semiconductor chips. Alternatively, the support material is disposed on the first semiconductor chip and a die attach material is disposed on the spacer. The second semiconductor chip is pressed into the die attach material and the support material, squeezing a portion of the support material over the spacer edges. Wirebonds are formed between the support substrate and the first and second semiconductor chips.

Abstract: A multi-chip module and a method for manufacturing the multi-chip module that mitigates wire breakage. A first semiconductor chip is mounted and wirebonded to a support substrate. A spacer is coupled to the first semiconductor chip. A support material is disposed on the spacer and a second semiconductor chip is positioned on the support material. The second semiconductor chip is pressed into the support material squeezing it into a region adjacent the spacer and between the first and second semiconductor chips. Alternatively, the support material is disposed on the first semiconductor chip and a die attach material is disposed on the spacer. The second semiconductor chip is pressed into the die attach material and the support material, squeezing a portion of the support material over the spacer edges. Wirebonds are formed between the support substrate and the first and second semiconductor chips.

Abstract: Stacked die assemblies and modules are fabricated by a process wherein discrete first and second, very thin semiconductor IC dies or chips are adhesively bonded together to form a mechanically robust stacked die assembly. A plurality of stacked die assemblies are then adhesively bonded to a substrate, e.g., a circuit board, electrically contacted, and encapsulated in a suitable pottant material. The formation of mechanically robust stacked die assemblies prior rather than subsequent to bonding to the substrate effectively minimizes fracture or other damage to the very thin and fragile semiconductor dies or chips resulting from non-planarity of the substrate surface and/or non-uniformity of adhesive layer thickness.