Multi-Chip Module and Method of Manufacture
A multi-chip module and a method for manufacturing the multi-chip module that mitigates wire breakage. A first semiconductor chip is mounted and wirebonded to a support substrate. A spacer is coupled to the first semiconductor chip. A support material is disposed on the spacer and a second semiconductor chip is positioned on the support material. The second semiconductor chip is pressed into the support material squeezing it into a region adjacent the spacer and between the first and second semiconductor chips. Alternatively, the support material is disposed on the first semiconductor chip and a die attach material is disposed on the spacer. The second semiconductor chip is pressed into the die attach material and the support material, squeezing a portion of the support material over the spacer edges. Wirebonds are formed between the support substrate and the first and second semiconductor chips.
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This application is a divisional of U.S. Non-Provisional Application No. 11/125,396, filed May 4, 2005, to issue as U.S. Pat. No. 8,586,413, which is incorporated herein by reference in its entirety.
FIELD OF THE INVENTIONThe present invention relates, in general, to semiconductor components and, more particularly, to semiconductor components comprising multi-chip modules.
BACKGROUND OF THE INVENTIONThe desire for faster, cheaper, and more efficient semiconductor components has motivated semiconductor component manufacturers to shrink the sizes of the devices fabricated in a semiconductor chip and place multiple semiconductor chips in a single package typically referred to as a multi-chip module. The semiconductor chips in a multi-chip module can be placed either in a horizontal orientation, i.e., beside each other, or in a vertical orientation, i.e., vertically stacked on top of each other. In a conventional vertically stacked multi-chip module, a first semiconductor chip is attached to a circuit board by adhesive bonding followed by wirebonding bonding pads located on the semiconductor chip to corresponding bonding pads located on the circuit board. A spacer is formed on or attached to the first semiconductor chip and a second semiconductor chip is attached to the spacer. Then bonding pads located on the second semiconductor chip are coupled to corresponding bonding pads located on the circuit board using, for example, a wirebonding process. The spacer must be smaller than the first semiconductor chip to accommodate the wirebonding process. What's more, the spacer is typically smaller than the second semiconductor chip. A drawback with this type of structure is that the portions of the second semiconductor chip that overhang the spacer are pliable or springy. Thus, when the bonding pads located on the overhanging portion of the second semiconductor chip are wirebonded to the corresponding bonding pads located on the circuit board, the pliability of the overhanging portions of the second semiconductor chip weakens the bonds formed to bonding pads on the second semiconductor chip. This bond weakening causes catastrophic device failure.
Accordingly, it would be advantageous to have a multi-chip module and a method for manufacturing the multi-chip module that does not degrade the integrity of the bonds formed to the bonding pads. It would be of further advantage for the method and structure to be cost efficient and suitable for integration with a variety of multi-chip module processes.
SUMMARY OF THE INVENTIONThe present invention satisfies the foregoing need by providing a multi-chip module and a method for manufacturing the multi-chip module. In accordance with one embodiment, the present invention includes providing a support substrate having first and second major surfaces, wherein the support substrate has a chip receiving area and a plurality of bonding pads. A first semiconductor chip is coupled to the chip receiving area, wherein the first semiconductor chip has a plurality of bonding pads. A first bonding pad of the first semiconductor chip is coupled to a first bonding pad of the support substrate. A spacer is coupled to a portion of the first semiconductor chip. A support material is disposed on at least one of the spacer or the first semiconductor chip. A second semiconductor chip is positioned on the support material, wherein the second semiconductor chip has a first major surface and a plurality of bonding pads. A first bonding pad of the second semiconductor chip is coupled to a second bonding pad of the support substrate.
In accordance with another embodiment, the present invention comprises a method for manufacturing a multi-chip module that includes providing a support substrate having, a first semiconductor chip mounted to a chip or die receiving area on the support substrate. The support substrate has a plurality of bonding pads and the first semiconductor chip has a plurality of bonding pads. A spacer is coupled to the first semiconductor chip and a support material is disposed on one of the spacer or the first semiconductor chip. A semiconductor chip is coupled to the spacer such that the support material, becomes positioned between the first semiconductor chip and the second semiconductor chip thereby providing support for the second semiconductor chip.
In accordance with yet another embodiment, the present invention comprises a multi-chip module having a support substrate that has a chip receiving area and a plurality of bonding pads. A first semiconductor chip having a plurality of bonding pads is mounted to the chip receiving area. A spacer having first and second opposing edges is coupled to the first semiconductor chip. A support material is in contact with the spacer. A second semiconductor chip is coupled to the spacer, wherein a portion of the support material is positioned between the first semiconductor chip and the second semiconductor chip.
The present invention will be better understood from a reading of the following detailed description, taken in conjunction with the accompanying drawing figures, in which like reference numbers designate like elements and in which:
Generally, the present invention provides a multi-chip module and a method for manufacturing the multi-chip module, wherein the semiconductor chips of the multi-chip module are vertically stacked. In vertically stacking the semiconductor chips of a multi-chip module, a spacer is inserted between the semiconductor chips to allow clearance for the wirebonds. A portion of the semiconductor chip positioned above the spacer overhangs the edges of the spacer. The portions of a semiconductor chip overhanging the spacer are pliable. Although the pliability increases the fragility of semiconductor chips in general, the increased fragility is more pronounced in semiconductor chips having thicknesses of less than about 0.6 millimeters (mm). This pliability allows the semiconductor chip to vibrate during the wirebonding process, which breaks the wires being bonded to bonding pads on the semiconductor chip. In accordance with the present invention, the vibration is mitigated by forming a support material under the portion of the second semiconductor chip that overhangs the spacer. The support material provides additional rigidity to the semiconductor chip, which decreases the vibrations of the overhanging portions of the semiconductor chip and improves the reliability of the wirebond.
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After curing die attach material 36, a die attach material 48 is disposed on a central portion of top surface 44 and a spacer 50 is placed on die attach material 48. Spacer 50 has top and bottom surfaces 52 and 54, respectively, and edges 53 and 55. Spacer 50 may be a dielectric material, a semiconductor material such as, for example, silicon, another semiconductor chip, or the like. Although spacer 50 is shown as having a square shape, its shape is not a limitation of the present invention. For example, spacer 50 have a rectangular shape, a round shape, a triangular shape, etc. Die attach material 48 is cured by heating it to a temperature ranging from about 100° C. to about 175° C. for a time ranging from about 5 minutes to about 60 minutes. Suitable die attach materials include silver filled epoxy, silica filled epoxy blend, an epoxy film filled with an organic material, and the like.
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A plurality of bonding pads 70 are electrically connected to corresponding bonding pads of plurality of bonding pads 20 using, for example, a wirebonding process. More particularly, bonding pad 70A is electrically connected to bonding pad 20A by an interconnect wire 74A and bonding pad 70B is electrically connected to bonding pad 20B by an interconnect wire 74B. Interconnect wires 74A and 74B are two interconnect wires of plurality of interconnect wires 74.
Referring now to FIG, 5, a protective covering 78 is formed over semiconductor chip 64, interconnect wires 56 and 74, and 130A substrate 12. The protective covering illustrated in
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A plurality of bonding pads 110 are electrically connected to corresponding bonding pads of plurality of bonding pads 20 using, for example, a wirebonding process. More particularly, bonding pad 110A is electrically connected to bonding pad 20A by an interconnect wire 114A and bonding pad 110B is electrically connected to bonding pad 20B by an interconnect wire 114B. For clarity of description, only two interconnect wires, i.e., interconnect wires 114A and 114B, of a plurality of interconnect wires are shown in
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By now it should be appreciated that a multi-chip module having vertically stacked semiconductor chips and a method for manufacturing the multi-chip module been provided. An advantage of multi-chip modules in accordance with the present invention is that it provides a means for decreasing vibration or bounce of regions of a semiconductor chip during a wirebonding process. This improves the reliability of the wirebonds and decreases catastrophic device failure. Another advantage of the present invention is that it increases the variety in the sizes of the semiconductor chips that can be bonded to a spacer. Because the support material provides additional support for the semiconductor chip, larger chips can be mounted to the spacer. In addition, the method is readily integrable into multi-chip module processing flows in a cost and time efficient manner.
Although certain preferred embodiments and methods have been disclosed herein, it will be apparent from the foregoing disclosure to those skilled in the art that variations and modifications of such embodiments and methods may be made without departing from the spirit and scope of the invention. For example, the support material may be disposed on the spacer and the first semiconductor chip. Alternatively, an adhesive film can be used to couple semiconductor chip 64 to spacer 50 rather than using a die attach material such as the attach material 48. An advantage of using an adhesive material is that an adhesive material does not have to be cured. It is intended that the invention shall be limited only to the extent required by the appended claims and the rules and principles of applicable law.
Claims
1. A multi-chip module, comprising:
- a support substrate having a chip receiving area and a plurality of substrate bonding pads;
- a first semiconductor chip having a first plurality of chip bonding pads, the first semiconductor chip mounted to the chip receiving area;
- a spacer having first and second opposing edges, the spacer coupled to the first semiconductor chip;
- a support material in contact with the spacer; and
- a second semiconductor chip having a second plurality of chip bonding pads, and coupled to the spacer using a die attach material, wherein a portion of the support material is positioned between, and in contact with, the first semiconductor chip and the second semiconductor chip.
2. The multi-chip module of claim 1, wherein the support material substantially fills the region between the first and second semiconductor chips.
3. The multi-chip module of claim 1, wherein the support material is disposed on the spacer.
4. The multi-chip module of claim 1, wherein the die attach material comprises at least one of silver filled epoxy, silica filled epoxy blend, or an epoxy film filled with an organic material.
5. The multi-chip module of claim 1, wherein the spacer comprises dielectric material or a semiconductor material.
6. The multi-chip module of claim 5, wherein the semiconductor material is silicon or a third semiconductor chip.
7. The multi-chip module of claim 1, wherein the spacer has a square shape, a rectangular shape, a round shape, or a triangular shape.
8. The multi-chip module of claim 1, wherein the support substrate is a ball grid array (BOA) substrate.
9. The multi-chip module of claim 1, wherein the support substrate is one of a pin grid array (PGA) substrate, a ceramic substrate, or a printed circuit board,
10. The multi-chip module of claim 1, wherein the support material is a thermal conductor and an electric insulator.
11. The multi-chip module of claim 1, wherein the support material is an epoxy paste.
12. The multi-chip module of claim 11, wherein the epoxy paste comprises an epoxy material filled with polytetrafluoroethylene, a nonconductive paste filled with an inorganic material, or a bismaleimide material filled with polytetrafluoroethylene.
13. The multi-chip module of claim 12, wherein the nonconductive paste includes silica.
14. The multi-chip module of claim 1, wherein the support material has a pre-cured shape of a double-Y shape, a dogbone shape, a circular shape, a triangular shape, a quadrilateral shape, a pentagonal shape, or another polygonal shape.
15. The multi-chip module of claim 1, further comprising:
- a first set of interconnect wires formed to electrically connect one or more of the first plurality of chip bonding pads to a first portion of the plurality of substrate bonding pads, and
- a second set of interconnect wires formed to electrically connect one or more of the second plurality of chip bonding pads to a second portion of the plurality of substrate bonding pads.
16. The multi-chip module of claim 15, further comprising:
- a protective covering formed over the second semiconductor chip, the first semiconductor chip, the support substrate, the first set of interconnect wires and the second interconnect wires.
17. The multi-chip module of claim 16, wherein the protective covering includes a lid secured to the support substrate using a lid attach material.
18. The multichip module of claim 1, wherein the support substrate comprises a resin.
19. The multi-chip module of claim 18, wherein the resin comprises one of an epoxy resin, a polyimide resin, a triazine resin, a phenolic resin or a bismaleimidetriazine (BT) resin.
20. The multi-chip module of claim 1, wherein the support substrate comprises an epoxy-glass composite, FR-4, or a ceramic.
Type: Application
Filed: Nov 11, 2013
Publication Date: Mar 6, 2014
Applicant: Spansion LLC (Sunnvyale, CA)
Inventors: Yin Lye FOONG (Milpitas, CA), Cheng Sim Kee (Bayan Lepas), Lay Hong Lee (Penang), Mohamed Suhaizal Bin Abu-Hassan (Pendang)
Application Number: 14/076,706
International Classification: H01L 25/065 (20060101);