Abstract: A dual-mode Wireless Local Area Network (WLAN) module installed in an electronic device (600) for wireless communication with other electronic devices includes an RF front-end unit (30), two dual-band antennas (40) coupled to the RF front-end unit, a dual-band radio frequency integrated circuit (RFIC) (20) coupled to the RF front-end unit, a dual-band base-band integrated circuit (BBIC) (10) coupled to the RFIC, and an interface unit coupled to both the BBIC and a computer (600). The RF front-end consists of transmitting and receiving paths. The RF front-end unit has antenna diversity control switching circuits (31, 33) for selecting an appropriate antenna and switching circuits (32, 34, 35, 36) for controlling ON/OFF states of transmitting/receiving paths of the RF front-end unit.

Abstract: A method of integrated circuit component integration in copper interconnects, including the following steps of the first embodiment. A wafer is provided having an exposed top-most planar copper interconnect. The wafer being divided into one or more areas selected from the group consisting of: a spiral inductor area having an exposed planar copper interconnect bottom half of a stacked spiral inductor; a MIM capacitor area having an exposed planar copper interconnect bottom plate and an exposed planar copper interconnect contact point of a MIM capacitor; and a precision resistor area having a two exposed planar copper interconnect routing points of a precision resistor. A spiral inductor is formed within the spiral inductor area; a MIM capacitor is formed within the MIM capacitor area; and a precision resistor is formed within the precision resistor area.

Abstract: A method of integrated circuit component integration in copper interconnects, including the following steps of the first embodiment. A wafer is provided having an exposed top-most planar copper interconnect. The wafer being divided into one or more areas selected from the group consisting of: a spiral inductor area having an exposed planar copper interconnect bottom half of a stacked spiral inductor; a MIM capacitor area having an exposed planar copper interconnect bottom plate and an exposed planar copper interconnect contact point of a MIM capacitor; and a precision resistor area having a two exposed planar copper interconnect routing points of a precision resistor. A spiral inductor is formed within the spiral inductor area; a MIM capacitor is formed within the MIM capacitor area; and a precision resistor is formed within the precision resistor area.