Abstract: An infrared filter film layer and an infrared filter structure are provided. The infrared filter film layer includes at least one silicon-based layer, at least one isolation layer, and at least one oxide layer that are stacked with each other. The at least one isolation layer is disposed between the at least one silicon-based layer and the at least one oxide layer. Through this configuration, the infrared filter film layer has good quality, such that an amount of wavelength drift is small in application. The infrared filter structure includes a light-transmitting substrate and the infrared filter film layer.

Abstract: The high-density MRAM device of the present invention has a second interlayer dielectric (ILD) layer covering the capping layer in the MRAM cell array area and the logic area. The thickness of the second ILD layer in the MRAM cell array area is greater than that in the logic area. The composition of the second ILD layer in the logic area is different from the composition of the second ILD layer in the MRAM cell array area.

Abstract: In an embodiment, a device includes: a gate structure on a channel region of a substrate; a gate mask on the gate structure, the gate mask including a first dielectric material and an impurity, a concentration of the impurity in the gate mask decreasing in a direction extending from an upper region of the gate mask to a lower region of the gate mask; a gate spacer on sidewalls of the gate mask and the gate structure, the gate spacer including the first dielectric material and the impurity, a concentration of the impurity in the gate spacer decreasing in a direction extending from an upper region of the gate spacer to a lower region of the gate spacer; and a source/drain region adjoining the gate spacer and the channel region.

Abstract: Provided is a method for preparing a tissue section, including treating a tissue specimen with a clearing agent and at least one labeling agent to obtain a cleared and labeled tissue specimen; generating a three-dimensional (3D) image of the cleared and labeled tissue specimen; performing an image slicing procedure on the 3D image to generate a plurality of two-dimensional (2D) images; identifying a target 2D image among the plurality of 2D images to obtain a distance value of D1, which indicates the distance between the target 2D image and a predetermined surface of the 3D image; preparing a hardened tissue specimen from the cleared and labeled tissue specimen; and cutting the hardened tissue specimen near a predetermined site to obtain a tissue section, wherein the distance between the predetermined site and a surface of the hardened tissue specimen corresponding to the predetermined surface of the 3D image is D1.

Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region, a MTJ on the MTJ region, a top electrode on the MTJ, a connecting structure on the top electrode, and a first metal interconnection on the logic region. Preferably, the first metal interconnection includes a via conductor on the substrate and a trench conductor, in which a bottom surface of the trench conductor is lower than a bottom surface of the connecting structure.

Abstract: The present invention provides a PTX3 monoclonal antibody or antibody Fab fragment thereof and use thereof. The aforementioned monoclonal antibody or antibody Fab fragment thereof specifically inhibit or slow down the binding of PTX3 to the PTX3 receptor, and may be used for a kit and method for detecting PTX3, and a pharmaceutical composition which inhibits or slows down diseases or symptoms associated with PTX3 and PTX3 receptor binding, and a use thereof.

Abstract: In an embodiment, a device includes: a gate structure on a channel region of a substrate; a gate mask on the gate structure, the gate mask including a first dielectric material and an impurity, a concentration of the impurity in the gate mask decreasing in a direction extending from an upper region of the gate mask to a lower region of the gate mask; a gate spacer on sidewalls of the gate mask and the gate structure, the gate spacer including the first dielectric material and the impurity, a concentration of the impurity in the gate spacer decreasing in a direction extending from an upper region of the gate spacer to a lower region of the gate spacer; and a source/drain region adjoining the gate spacer and the channel region.

Abstract: Embodiments of the present application provide a rotor and a motor. The rotor has a plurality of through-hole groups. Each through-hole group has a plurality of through-holes distributed in a radial direction. The rotor also has auxiliary holes. Each auxiliary hole is located between every two radially adjacent through-holes. A sectional area of each auxiliary hole is less than a sectional area of each through-hole. When a first angle, a second angle and a third angle are defined between three portions of each auxiliary hole and the q-axis respectively, the third angle is greater than or equal to the first angle, and the third angle is less than or equal to the second angle.

Abstract: A connector module capable of transmitting display data signals includes first and second light-emitting devices, a module connector including first and second terminals, and first and second optical transceivers respectively including at least one electrical-optical converting circuit and at least one optical-electrical converting circuit. One of the at least one electrical-optical converting circuit of the first optical transceiver is electrically coupled to the first light-emitting device and the first terminal, and one of the at least one electrical-optical converting circuit of the second optical transceiver is electrically coupled to the second light-emitting device and the second terminal. A portion of the at least one optical-electrical converting circuit of the first optical transceiver is electrically isolated to any optoelectronic device and the module connector.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, in which the MTJ stack includes a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer. Next, a top electrode is formed on the MTJ stack, the top electrode, the free layer, and the barrier layer are removed, a first cap layer is formed on the top electrode, the free layer, and the barrier layer, and the first cap layer and the pinned layer are removed to form a MTJ and a spacer adjacent to the MTJ.

Abstract: Certain aspects of the present disclosure are generally directed to apparatus and techniques for event state detection. One example method generally includes receiving a plurality of sensor signals at a computing device, determining, at the computing device, probabilities of sub-event states based on the plurality of sensor signals using an artificial neural network for each of a plurality of time intervals, and detecting, at the computing device, the event state based on the probabilities of the sub-event states via a state sequence model.

Abstract: An optical integrated device and a preparation method therefor.

Abstract: The first semiconductor layer and the second semiconductor layer are above the first semiconductor layer, in which the first and second semiconductor layers are vertically spaced apart from each other. The first and second source/drain epitaxial features are respectively on first and second sides of the first semiconductor layer. The third and fourth source/drain epitaxial features are respectively on first and second sides of the second semiconductor layer and above the first source/drain epitaxial feature. The first, third, and fourth source/drain epitaxial features have a first conductive type, and the second source/drain epitaxial feature has a second conductive type opposite to the first conductive type.

Abstract: Systems for unlocking and locking a riser cage to a computing device are described herein. Such systems may include: a riser cage in a computing device; an axis member coupled to a first side of the riser cage and adapted to rotate about an axis; a handle coupled to the axis member and adapted to rotate the axis member about the axis; a cam, coupled to the axis member, and adapted to rotate about the axis when the axis member rotates; and a lever coupled to a second side of the riser cage and adapted to rotate about a pivot point when the cam rotates, wherein the lever engages with a stabilizing feature when the handle is in a first handle position.

Abstract: A magnetic random access memory (MRAM) device includes a first magnetic tunneling junction (MTJ) on a substrate, a first top electrode on the first MTJ, and a passivation layer around the first MTJ. Preferably, the passivation layer includes a V-shape and a valley point of the V-shape is higher than a top surface of the first top electrode.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: A device comprises a semiconductor-superconductor hybrid structure comprising a semiconductor component and a superconductor component, the superconductor component comprising a layer of aluminium; at least one conductive lead in tunnelling communication with the semiconductor-superconductor hybrid structure; and a tunnel barrier arranged between the semiconductor-superconductor hybrid structure and the at least one conductive lead. The conductive lead is arranged over the superconductor component such that the superconductor component shields the semiconductor component from the conductive lead. The tunnel barrier is arranged between the superconductor component and the at least one conductive lead. The tunnel barrier consists of a native aluminium oxide layer formed integrally to the superconductor component. Forming the tunnel barrier integrally to the superconductor component provides a high-quality dielectric barrier between the conductive lead and the semiconductor-superconductor hybrid structure.

Abstract: The present invention relates to a method for treating or alleviating an osteoporosis in a subject. The method comprises steps of identifying the subject having the osteoporosis, and administering to the subject an effective amount of a composition that increases a level of Discoidin Domain Receptor 1 (DDR1) protein in the subject.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: A smart projection vehicle lamp includes laser light sources, two-dimensional MEMS mirrors, focusing lenses, a reflective phosphor plate, a narrow-band blue light reflector, and a lens group. The two-dimensional MEMS mirrors are correspondingly arranged on paths of laser light beams of the laser light sources. The laser light beams are dynamically reflected by the two-dimensional MEMS mirrors. The reflective phosphor plate has a phosphor layer and a reflective layer located on one side of the phosphor layer. The narrow-band blue light reflector is disposed between the focusing lenses and the reflective phosphor plate, and has a reflective band and a transmissive band. The converged laser light beams are reflected by the reflective band and illuminate the reflective phosphor plate. The laser light beams excite the phosphor layer and are mixed into visible light reflected by the reflective layer and passes through the transmissive band to be emitted outward.