Patents by Inventor Ying Chou Tsai

Ying Chou Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11404361
    Abstract: A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: August 2, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Yi-Hsuan Liu, Mei-Chi Chen, Ying-Chou Tsai
  • Patent number: 11114393
    Abstract: An electronic package and a method for fabricating the same are provided. A plurality of electronic components are disposed in a packaging structure. At least one antenna structure is stacked via a plurality of conductive elements on the packaging structure. The antenna structure is electrically connected to at least one of the electronic components. The electronic components have different radio frequencies. In mass production, the antenna structures of different antenna types are stacked on the packaging structure, and a radio frequency product of various frequencies can be produced. Radio frequency chips of different frequencies need not be fabricated into a variety of individual packaging modules. Therefore, the production cost is reduced, and the production speed is increased.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: September 7, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Wen-Jung Tsai, Ching-Chia Chen, Ying-Chou Tsai
  • Publication number: 20210066173
    Abstract: A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.
    Type: Application
    Filed: November 12, 2020
    Publication date: March 4, 2021
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Yi-Hsuan Liu, Mei-Chi Chen, Ying-Chou Tsai
  • Patent number: 10872847
    Abstract: A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: December 22, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Yi-Hsuan Liu, Mei-Chi Chen, Ying-Chou Tsai
  • Patent number: 10833394
    Abstract: An electronic package and a method for fabricating the same are provided. An antenna frame, a first electronic component, and a second electronic component electrically connected to the antenna frame are disposed on a lower side of a carrying structure. An antenna structure is disposed on an upper side of the carrying structure and is electrically connected to the first electronic component. Therefore, two different types of antennas are integrated into an identical electronic package. Such the electronic package bonded to a circuit can transmit signals with two different wavelengths, even if the electronic package does not have any area increased.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: November 10, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Wen-Jung Tsai, Mao-Hua Yeh, Chih-Hsien Chiu, Ying-Chou Tsai, Chun-Chi Ke
  • Publication number: 20200328166
    Abstract: An electronic package and a method for fabricating the same are provided. A plurality of electronic components are disposed in a packaging structure. At least one antenna structure is stacked via a plurality of conductive elements on the packaging structure. The antenna structure is electrically connected to at least one of the electronic components. The electronic components have different radio frequencies. In mass production, the antenna structures of different antenna types are stacked on the packaging structure, and a radio frequency product of various frequencies can be produced. Radio frequency chips of different frequencies need not be fabricated into a variety of individual packaging modules. Therefore, the production cost is reduced, and the production speed is increased.
    Type: Application
    Filed: August 7, 2019
    Publication date: October 15, 2020
    Inventors: Wen-Jung Tsai, Ching-Chia Chen, Ying-Chou Tsai
  • Publication number: 20200235462
    Abstract: An electronic package and a method for fabricating the same are provided. An antenna frame, a first electronic component, and a second electronic component electrically connected to the antenna frame are disposed on a lower side of a carrying structure. An antenna structure is disposed on an upper side of the carrying structure and is electrically connected to the first electronic component. Therefore, two different types of antennas are integrated into an identical electronic package. Such the electronic package bonded to a circuit can transmit signals with two different wavelengths, even if the electronic package does not have any area increased.
    Type: Application
    Filed: August 7, 2019
    Publication date: July 23, 2020
    Inventors: Wen-Jung Tsai, Mao-Hua Yeh, Chih-Hsien Chiu, Ying-Chou Tsai, Chun-Chi Ke
  • Patent number: 10224243
    Abstract: An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: March 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Chang-Yi Lan, Ying-Chou Tsai
  • Publication number: 20190043819
    Abstract: An electronic package is provided, including an electronic component, a redistribution structure formed on the electronic component, a plurality of conductive posts bonded to the redistribution structure, and a redistribution layer bonded to the conductive posts. As such, the electronic component that meets the requirement of miniaturization can be electrically connected to an electronic device through the redistribution structure, the conductive posts and the redistribution layer.
    Type: Application
    Filed: January 12, 2018
    Publication date: February 7, 2019
    Inventors: Chi-Ching Ho, Ying-Chou Tsai
  • Patent number: 10201090
    Abstract: A circuit structure is provided, which includes a plurality of conductive posts, and a plurality of first and second conductive pads formed on two opposite end surfaces of the conductive posts, respectively. A length of each of the first conductive pads is greater than a width of the first conductive pad so as to reduce an occupation area of the first conductive pad along the width and increase a distance between adjacent first conductive pads, thereby increasing the wiring density and meeting the wiring demand.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: February 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Ying-Chou Tsai
  • Publication number: 20180342446
    Abstract: A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.
    Type: Application
    Filed: September 29, 2017
    Publication date: November 29, 2018
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Yi-Hsuan Liu, Mei-Chi Chen, Ying-Chou Tsai
  • Patent number: 9991197
    Abstract: A semiconductor package is provided, which includes: a dielectric layer made of a material used for fabricating built-up layer structures; a conductive trace layer formed on the dielectric layer; a semiconductor chip is mounted on and electrically connected to the conductive trace layer; and an encapsulant formed over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. Since a strong bonding is formed between the dielectric layer and the conductive trace layer, the present invention can prevent delamination between the dielectric layer and the conductive trace layer from occurrence, thereby improving reliability and facilitating the package miniaturization by current fabrication methods.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 5, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chia-Cheng Chen, Chi-Ching Ho, Shao-Tzu Tang, Yu-Che Liu, Ying-Chou Tsai
  • Patent number: 9978673
    Abstract: A package structure is provided, including a carrier, an electronic component disposed on the carrier and having a sensing area, an encapsulant formed on the carrier and encapsulating the electronic component and the sensing area, and a conductive layer formed on the encapsulant with the sensing area of the electronic component free from being covered by the conductive layer. The encapsulant prevents a user's finger from being in direct contact with the sensing area so as to protect the sensing area from being damaged and hence ensure normal operation of the electronic component.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: May 22, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Chien-Hui Wang, Chung-Yan Huang, Ying-Chou Tsai
  • Publication number: 20180068896
    Abstract: An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 8, 2018
    Inventors: Shao-Tzu Tang, Chang-Yi Lan, Ying-Chou Tsai
  • Publication number: 20180061747
    Abstract: A package structure is provided, including a carrier, an electronic component disposed on the carrier and having a sensing area, an encapsulant formed on the carrier and encapsulating the electronic component and the sensing area, and a conductive layer formed on the encapsulant with the sensing area of the electronic component free from being covered by the conductive layer. The encapsulant prevents a user's finger from being in direct contact with the sensing area so as to protect the sensing area from being damaged and hence ensure normal operation of the electronic component.
    Type: Application
    Filed: January 4, 2017
    Publication date: March 1, 2018
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Chien-Hui Wang, Chung-Yan Huang, Ying-Chou Tsai
  • Patent number: 9899235
    Abstract: A packaging substrate is disclosed, which includes: a dielectric layer; a circuit layer embedded in and exposed from a surface of the dielectric layer, wherein the circuit layer has a plurality of conductive pads; and a plurality of conductive bumps formed on the conductive pads and protruding above the surface of the dielectric layer. As such, when an electronic element is disposed on the conductive pads through a plurality of conductive elements, the conductive elements can come into contact with both top and side surfaces of the conductive bumps so as to increase the contact area between the conductive elements and the conductive pads, thereby strengthening the bonding between the conductive elements and the conductive pads and preventing delamination of the conductive elements from the conductive pads.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: February 20, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Ching Ho, Ying-Chou Tsai, Sheng-Che Huang
  • Patent number: 9805979
    Abstract: An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: October 31, 2017
    Assignee: Siliconware Precision Industires Co., Ltd.
    Inventors: Shao-Tzu Tang, Chang-Yi Lan, Ying-Chou Tsai
  • Publication number: 20170294372
    Abstract: A semiconductor package is provided, which includes: a dielectric layer made of a material used for fabricating built-up layer structures; a conductive trace layer formed on the dielectric layer; a semiconductor chip is mounted on and electrically connected to the conductive trace layer; and an encapsulant formed over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. Since a strong bonding is formed between the dielectric layer and the conductive trace layer, the present invention can prevent delamination between the dielectric layer and the conductive trace layer from occurrence, thereby improving reliability and facilitating the package miniaturization by current fabrication methods.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Chia-Cheng Chen, Chi-Ching Ho, Shao-Tzu Tang, Yu-Che Liu, Ying-Chou Tsai
  • Publication number: 20170273185
    Abstract: A circuit structure is provided, which includes a plurality of conductive posts, and a plurality of first and second conductive pads formed on two opposite end surfaces of the conductive posts, respectively. A length of each of the first conductive pads is greater than a width of the first conductive pad so as to reduce an occupation area of the first conductive pad along the width and increase a distance between adjacent first conductive pads, thereby increasing the wiring density and meeting the wiring demand.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Shao-Tzu Tang, Ying-Chou Tsai
  • Patent number: 9699910
    Abstract: A circuit structure is provided, which includes a plurality of conductive posts, and a plurality of first and second conductive pads formed on two opposite end surfaces of the conductive posts, respectively. A length of each of the first conductive pads is greater than a width of the first conductive pad so as to reduce an occupation area of the first conductive pad along the width and increase a distance between adjacent first conductive pads, thereby increasing the wiring density and meeting the wiring demand.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: July 4, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-tzu Tang, Ying-Chou Tsai