Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: A display panel includes: a substrate, sub-pixels and a gate drive circuit. The sub-pixel includes a pixel drive circuit. The gate drive circuit includes cascaded shift registers, and a shift register is electrically connected to pixel drive circuits in a row of sub-pixels. The gate drive circuit further includes cascade input signal lines and cascade display reset signal lines. The cascade input signal line is configured to connect a shift signal terminal and an input signal terminal of two different shift register; and the cascade display reset signal line is configured to connect a shift signal terminal and a display reset signal terminal of two different shift register. The display panel has sub-pixel regions for arranging the sub-pixels and first gap regions each located between two adjacent columns of sub-pixel regions; the cascade display reset signal lines and the cascade input signal lines are disposed in different first gap regions.

Abstract: Provided is a comprehensive quantitative evaluation method and system for welding usability of welding consumables.

Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.

Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.

Abstract: Provided are a display substrate and a display device. The display substrate includes a driving transistor and a storage capacitor, the storage capacitor includes a first electrode plate and a second electrode plate, the second electrode plate is arranged in a same layer as the channel of the driving transistor, the second electrode plate is closer to the base substrate than the first electrode plate, an orthographic projection of the second electrode plate on the base substrate overlaps with an orthographic projection of the pixel opening on the base substrate, the display substrate satisfies a following relationship: a value range of (W*L+S2)*M1/M2 is [0.014, 0.133], and a value range of S2/(W*L) is [2.82, 28.

Abstract: A driving circuit, a driving module, a driving method, a display substrate and a display device are provided. The driving circuit includes a first leakage prevention circuit, an output circuit and a first control node control circuit; the first leakage prevention circuit is configured to control to connect or disconnect the first control node, the first node and the first intermediate node under the control of a first voltage signal provided by the first voltage line according to a potential of the first intermediate node, control to connect or disconnect the first intermediate node and the second voltage line under the control of the potential of the first node, and control to disconnect the first control node and the first node when the first intermediate node and the second voltage line is connected.

Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.

Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, the sub-pixel includes a pixel circuit and a light-emitting element, the pixel circuit is configured to drive the light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting functional layer located therebetween; the pixel circuit includes a driving transistor, and the first electrode of the light-emitting element is electrically connected to a first electrode of the driving transistor; the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel is adjacent to the second sub-pixel, and an orthographic projection of the first electrode of the light-emitting element of the first sub-pixel on the base substrate does not overlap an orthographic projection of the pixel circuit of the second sub-pixel on the base substrate.

Abstract: Provided is a pixel drive circuit. The pixel drive circuit includes a plurality of scan drive circuits transmitting gate drive signals to pixels, a plurality of emission drive circuits transmitting emission control signals to the pixels, a plurality of compensation drive circuits transmitting compensation signals to the pixels, and a plurality of reset drive circuits transmitting reset signals to the pixels, which are all cascaded in a pixel column direction. In addition, the scan drive circuit, the emission drive circuit, the compensation drive circuit, and the reset drive circuit corresponding to the same row of pixels are arranged sequentially along a pixel row direction, the scan drive circuit being disposed farthest away from the pixels. Moreover, among signal lines coupled to the pixel drive circuit, a plurality of signal lines is overlapped with each other, and cutouts are provided at the overlapping portions of the plurality of signal lines.

Abstract: The present disclosure provides a transparent display device, a simulation method, and a manufacturing method. The transparent display device includes a base substrate and a plurality of pixels arranged in an array form on the base substrate. Each pixel includes a transparent region and a display region, and a scattering structure for scattering light is arranged along a boundary between the transparent region and the display region.

Abstract: A grid-driving-circuit array is applied to a display panel, the display panel is delimited into a plurality of active areas, and each of the active areas includes multiple rows of pixel units and multiple rows of grid lines. The multiple groups of grid driving units supply grid driving signals to the plurality of active areas, and each of the groups of grid driving units includes one or more grid driving circuits. The one or more grid driving circuits are configured for supplying the grid driving signals to the grid lines within the active area corresponding to the one or more grid driving circuits. One or more multiplexers, wherein each of the multiplexers includes a plurality of frame-starting-up-signal outputting units, each of the frame-starting-up-signal outputting units of the multiplexer is configured for supplying a frame starting-up signal to one of the grid driving circuits.

Abstract: Pixel circuit, driving method, display substrate, panel and device are disclosed. The pixel circuit includes light-emitting element, and pixel driving circuit including driving circuit, data writing circuit and compensation control circuit; the data writing circuit writes data voltage into control end of driving circuit under control of write control signal in data writing phase; the compensation control circuit writes reference voltage into the control end of driving circuit under control of compensation control signal in compensation phase; the driving circuit is electrically connected to the light-emitting element, and is configured to drive the light-emitting element; the data writing phase does not overlap with the compensation phase.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a base substrate; a detection circuit, located on the side of the base substrate, and including a transistor and a photosensitive detection component electrically connected to the transistor, and an orthographic projection of the transistor on the base substrate and an orthographic projection of the photosensitive detection component on the base substrate do not overlap with each other; a planarization layer, located on the side of the detection circuit facing away from the base substrate, and including a first surface facing away from the base substrate at the position in which the transistor is located, and a second surface facing away from the base substrate at the position in which the photosensitive detection component is located; and a light-emitting device, located on the side of the planarization layer away from the detection circuit.

Abstract: The display substrate includes: a substrate; a plurality of pixel units on the substrate, each pixel unit includes a plurality of sub-pixels, each sub-pixel includes a light-emitting element and a pixel drive circuit; a photosensitive circuit on the substrate; a first conductive film layer on the substrate. The pixel drive circuit includes a drive transistor, a gate electrode of the drive transistor is located on a side of a drive active layer away from the substrate, an orthographic projection of the gate electrode of the drive transistor on the substrate at least partially overlaps an orthographic projection of the drive active layer on the substrate. The first conductive film layer includes a first light-shielding portion between the substrate and the drive active layer, and an orthographic projection of the first light-shielding portion on the substrate at least partially overlaps the orthographic projection of the drive active layer on the substrate.

Abstract: Provided are semiconductor dies and methods for forming semiconductor dies. A method includes forming a semiconductor die having under bump metal (UBM) pads in a dense region and in an isolated region; forming external electrical connectors in contact with the UBM pads; and limiting the external electrical connectors to a pre-selected vertical height.

Abstract: A knitted component comprising two yarns, forming at least a heel region of an upper for an article of footwear, where one of the yarns comprises a thermoplastic material. The outer surface may include a fused area comprising a first thermoplastic yarn. The inner surface may be at least partially formed with a second yarn and may substantially exclude the thermoplastic material. There may be a transitional area including a reduced amount of thermoplastic material relative to a fused area. The knitted component may include a cushioning material between layers of the knit element.

Abstract: Provided are a display substrate, a manufacturing method thereof and a display apparatus. The display substrate includes multiple sub-pixels, wherein each sub-pixel includes a light-emitting region and a non-light-emitting region, and each sub-pixel is provided with a drive circuit; the drive circuit includes a storage capacitor and multiple transistors; for each sub-pixel, the multiple transistors are in the non-light-emitting region, the storage capacitor is a transparent capacitor, and an orthographic projection of the storage capacitor on a base substrate coincides with the light-emitting region. A first electrode of the storage capacitor is disposed in a same layer as an active layer of the multiple transistors, but in a different layer from source and drain electrodes of the multiple transistors, and a second electrode of the storage capacitor is on a side of the first electrode close to the base substrate.

Abstract: The present disclosure describes a semiconductor device having an identification device for chip identification. The semiconductor structure includes first and second channel structures on a substrate, a gate structure on the first and second channel structures, an epitaxial structure on the first and second channel structures, and a first source/drain (S/D) contact structure on the first channel structure. The epitaxial structure is at a first side of the gate structure and the first S/D contact structure is at a second side of the gate structure opposite to the first side. The semiconductor structure further includes a second S/D contact structure on the second channel structure. The second S/D contact structure is at the second side of the gate structure.

Abstract: A method of forming a semiconductor structure includes forming a fin over a semiconductor substrate, forming an isolation region on sidewalls of the fin, forming a metal gate over the fin and the isolation region, etching the metal gate to form a trench through the isolation region, passivating the top portion of the semiconductor substrate exposed in the trench to form a dielectric layer at a bottom of the trench, and depositing a dielectric material in the trench to form a dielectric structure. The dielectric structure divides the metal gate into two sections.