Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.

Abstract: A method of forming a semiconductor structure includes forming a conductive capping layer over a conductive feature, forming a dielectric layer over the conductive capping layer, forming an opening in the dielectric layer to expose a top surface of the conductive capping layer, forming an inhibitor film at the top surface of the conductive capping layer, depositing a barrier layer on sidewalls of the opening, removing the inhibitor film to expose the top surface of the conductive capping layer, depositing a supplementary liner on the barrier layer and the top surface of the conductive capping layer, and depositing a conductive material on the supplementary liner and filling the opening.

Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.

Abstract: A driving circuit, a driving method and a display device are provided. The driving circuit includes a first control node control circuit, a second control node control circuit, a first node control circuit and a second node control circuit, wherein, the first control node control circuit is configured to control a potential of the first control node; the second control node control circuit is configured to control a potential of the second control node; the first node control circuit is configured to control a potential of the first node; the second node control circuit is electrically connected to the second control node, a first clock signal terminal and a second node respectively, and is configured to control to connect the first clock signal terminal and the second node under the control of the potential of the second control node.

Abstract: The present disclosure describes an example layout and method for cell placement in an integrated circuit (IC) layout design. The layout includes a first semiconductor structure having a first channel with a first channel width and a second semiconductor structure having a second channel with a second channel width different from the first channel width. The first and second channels can be in contact with each other. The method includes disposing a first diffusion region in a layout area and disposing a second diffusion region in the layout area. The first diffusion region can have a first diffusion region width and the second diffusion region can have a second diffusion region width different from the first diffusion region width.

Abstract: A display device and a driving method thereof. The display device includes a display substrate and at least one optical sensing unit; the display substrate includes a light-emitting region and a plurality of pixel units located in the light-emitting region; wherein the light-emitting region comprises a single-sided light-emitting region and at least one double-sided light-emitting region, and each of the pixel units in the plurality of pixel units comprises a plurality of sub-pixels; and the at least one optical sensing unit corresponds to the at least one double-sided light-emitting region from a non-display side of the display substrate, and configured to sense light emitted by the sub-pixels during operation in the at least one double-sided light-emitting region, and to provide sensing brightness information of the at least one double-sided light-emitting region to perform brightness compensation on the light-emitting region.

Abstract: A display panel, a manufacturing method thereof, and a display device are provided. The display panel includes: a base substrate; a conductive connection member including a separation structure; a light-emitting functional layer, located on a side of the conductive connection member facing away from the base substrate, and disconnected at the separation structure; a first electrode, located on a side of the light-emitting functional layer facing away from the base substrate, and an auxiliary electrode located on a side of the conductive connection member close to the base substrate; the first electrode is connected with the conductive connection member at the separation structure, the first electrode is connected with the auxiliary electrode through the conductive connection member, and the separation structure includes a groove, and an angle between an orientation of the groove and the base substrate is an acute angle.

Abstract: The present disclosure provides a display substrate, a display device and a manufacturing method thereof. The display substrate includes a first substrate, a pixel defining layer on the first substrate and including a plurality of sub-pixel openings, and at least one recess on a side of the display substrate away from the first substrate. An orthographic projection of the at least one recess on the first substrate and orthographic projections of the plurality of sub-pixel openings on the first substrate do not overlap.

Abstract: A display panel and a display apparatus are provided, the display panel includes a substrate and a drive circuit layer, the drive circuit layer includes a pixel drive circuit (PE) and a first scan signal line (G1), the pixel drive circuit is electrically connected with the first scan signal line (G1), and the first scan signal lines (G1) connected with adjacent rows of pixel drive circuits are electrically isolated; the drive circuit layer further includes a first signal line located in a non-display region (AA?) and a second signal line corresponding to the first signal line, the first signal line is configured to supply a signal to the first scan signal line (G1), an orthographic projection of the first signal line on the substrate at least partially overlaps an orthographic projection of the corresponding second signal line on the substrate.

Abstract: A pixel driving circuit is provided to include: a driving transistor; a data writing circuit configured to write a display data voltage from the data line to a first node in a display driving process, and sequentially write a sensing data voltage and a reset data voltage from the data line to the first node in a threshold voltage sensing process; a threshold compensation circuit configured to write a reference voltage from a reference voltage supply terminal to the first node and write a first compensation voltage to a second node in the display driving process, and write a second compensation voltage to the second node when a voltage at the first node changes from the reference voltage to the display data voltage; a sensing circuit configured to write an initialization voltage from the sensing line to the second node in the threshold voltage sensing process; a light emitting element.

Abstract: A semiconductor device includes a first transistor, a first via contact, a second transistor and a second via contact. The first transistor includes a channel and a gate electrode. The first via contact is disposed on the gate electrode of the first transistor, and corresponds in position to the channel of the first transistor. The second transistor includes a channel and a gate electrode. The second via contact is disposed on the gate electrode of the second transistor, and corresponds in position to the channel of the second transistor. A distance between the second via contact and the channel of the second transistor is smaller than a distance between the first via contact and the channel of the first transistor.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a source region, a drain region, a channel region and a plurality of fins. The channel region is located between the source region and the drain region, and the fins pass through the source region, the drain region and the channel region, wherein a number of the fins located in the source region and the drain region and a number of the fins located in the channel region are not equal.

Abstract: An organic light-emitting diode (OLED) display substrate, a manufacturing method thereof and a display panel are provided. The OLED display substrate has pixel regions and includes a base substrate and a pixel defining layer disposed on the base substrate; in regions of the pixel defining layer corresponding to the pixel regions, accommodation parts penetrating the pixel defining layer are disposed, and the pixel defining layer is further provided with guide parts disposed corresponding to the accommodation parts, the guide parts are located on a periphery of the corresponding accommodation parts and formed by recessed areas which are formed on a side of the pixel defining layer away from the base substrate, the recessed areas do not penetrate the pixel defining layer, and an orthographic projection of the guide part on the base substrate is directly coupled to an orthographic projection of the corresponding accommodation part on the base substrate.

Abstract: A semiconductor structure with a protective ring and the method of forming the same are provided. The semiconductor structure may comprise an integrated circuit die and an encapsulant encircling the integrated circuit die in a top down view. The integrated circuit die may comprise a substrate having an electrical device, an interconnect structure on the substrate and electrically coupled to the electrical device, a seal ring in the interconnect structure and encircling the electrical device in the top down view, and a protective ring at least partially embedded in the substrate. The protective ring may encircle the seal ring in a top down view and may comprise a material different from a material of the substrate.

Abstract: A knitted component comprising two yarns, forming at least a heel region of an upper for an article of footwear, where one of the yarns comprises a thermoplastic material. The outer surface may include a fused area comprising a first thermoplastic yarn. The inner surface may be at least partially formed with a second yarn and may substantially exclude the thermoplastic material. There may be a transitional area including a reduced amount of thermoplastic material relative to a fused area. The knitted component may include a cushioning material between layers of the knit element.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a light-shielding layer. The base substrate includes a display region including repeating units, each repeating unit includes a transparent region and a pixel region, the pixel region includes sub-pixels, each sub-pixel includes a sub-pixel driving circuit and a light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting layer located between the first electrode and the second electrode. The light-shielding layer is located on a side of the sub-pixel driving circuit close to the base substrate, at least part of an orthographic projection of the light-shielding layer on a main surface of the base substrate overlaps with an orthographic projection of the sub-pixel driving circuit on the main surface of the base substrate, and the light-shielding layer is connected with the second electrode.

Abstract: A display substrate includes: a base substrate, a plurality of pixel units and a plurality of initialization voltage signal lines. The pixel units are arranged in an array to form a plurality of rows of pixel units and a plurality of columns of pixel units, at least one pixel unit includes sub-pixels, and at least one sub-pixel includes a light-emitting element and a pixel driving circuit. The initialization voltage signal lines are configured to provide initialization voltage signals to the plurality of rows of pixel units respectively, and are arranged at intervals along a second direction. At least one initialization voltage signal line extends along a first direction. The plurality of rows of pixel units include a (2n?1)th row and a 2nth row and pixel driving circuits of the (2n?1)th row and pixel driving circuits of the 2nth rows share a common initialization voltage signal line.

Abstract: A display panel and a display device are provided, the display panel has a display region, a dummy pixel region and a circuit region, the display region a planarization layer and an encapsulation layer. The circuit region includes a plurality of wires and a frame sealant. The frame sealant overlaps with at least a part of the wires, the encapsulation layer overlaps with at least a part of the frame sealant. The planarization layer includes at least one groove in the circuit region, and overlapping with at least a part of the wires. A first side and a second side of the display region include a binding region, and at least one first chip-on-film in the first binding region on the first side and at least one second chip-on-film in the second binding region on the second side are centrosymmetric with respect to a center of the display region.

Abstract: A sport assistance system and a sport assistance method are provided. The sport assistance method includes: obtaining a real-time heart rate; executing a first assistance procedure according to a target heart rate, a maximum heart rate, a resting heart rate, a first media and the real-time heart rate; and executing a second assistance procedure according to the target heart rate and the real-time heart rate. The first assistance procedure includes: playing the first media at a first tempo rate; and adjusting the first tempo rate according to the real-time heart rate until the real-time heart rate is close to the target heart rate and a first scheduled time is met. The first initial value is greater than the resting heart rate. The second assistance procedure includes: playing a second media; and adjusting a second tempo rate according to an adjustment parameter until a second scheduled time is met.