Patents by Inventor Ying-hao Kuo

Ying-hao Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150146203
    Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO
  • Publication number: 20150145082
    Abstract: A backside-illuminated photodetector structure comprising a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, ltd.
    Inventors: Wan-Yu LEE, Ying-Hao KUO
  • Publication number: 20150146268
    Abstract: An optical scanner includes a substrate, and a tunable laser on the substrate, wherein the tunable laser is configured to emit light, and to sweep a wavelength of the emitted light through a waveband. The optical scanner further includes a grating over a top surface of the substrate, the grating configured to diffract light emitted from the tunable laser, and an angled reflective surface configured to reflect the diffracted light from the grating. The optical scanner further includes a refractive element configured to receive the reflected light from the angled reflective surface. The refractive element is configured to focus the reflected light in a first direction and to diverge the reflected light in a second direction perpendicular to the first direction.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Yu HUANG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150147852
    Abstract: A vacuum carrier module includes a substrate having at least one hole and an edge region. There is at least one support on a top surface of the substrate. Further, a gel film is adhered to the edge region of the substrate. The at least one hole fluidly connects a reservoir located above the top surface of the substrate. A method of using a vacuum carrier module includes planarizing a gel film by passing an alignment material through a hole in a substrate to contact a first surface of the gel film, positioning at least one chip on a second surface of the gel film opposite the first surface. The method further includes encasing the at least one chip in a molding material and applying a vacuum to the first surface of the gel film.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Yu HUANG, Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150146275
    Abstract: An electro-optic modulator including a semiconductor region, a first reflecting region over the semiconductor region and an anti-reflecting region on an opposite surface of the semiconductor region from the first reflecting layer. The semiconductor region includes a first doped region and a second doped region.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu LEE, Ying-Hao KUO
  • Patent number: 9041015
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20150130047
    Abstract: A method of forming a semiconductor package includes forming a thermal conductivity layer and attaching the thermal conductivity layer to a chip. The chip has a first surface and a second surface. The thermal conductivity layer is attached to the first surface of the chip. The thermal conductivity layer provides a path through which heat generated from the chip is dissipated to the ambient. A substrate is attached to the second surface of the chip. A molding compound is formed above the substrate to encapsulate the chip and the thermal conductivity layer.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150131938
    Abstract: An approach is provided for forming a light coupling in a waveguide layer. The approach involves forming a waveguide layer overlaying an upper surface of a substrate. The approach also involves placing a chip package portion within the waveguide layer in a selected position. The approach further involves forming a molding compound layer overlaying the waveguide layer and the chip package portion. The approach additionally involves curing the molding compound layer to form a cured package. The approach also involves releasing the cured package from the substrate and inverting the cured package. The approach further involves forming a ridge waveguide structure in the waveguide layer by removing a portion of the lower surface of the cured package.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY. LTD.
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150131089
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO
  • Publication number: 20150132008
    Abstract: A multi-layer integrated circuit comprises a light source configured to input source light to a first optical transmitter. The first optical transmitter is configured to modify the source light and to output a first modulated light based on data received from a first circuit to a second optical receiver. The first modulated light indicates a first data set, the second optical receiver is configured to receive the first modulated light and communicate the first data set to a second circuit.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150131939
    Abstract: An apparatus and method of forming a chip package with a waveguide for light coupling is disclosed. The method includes depositing an adhesive layer over a carrier. The method further includes depositing a laser diode (LD) die having a laser emitting area onto the adhesive layer and depositing a molding layer over the LD die and the adhesive layer. The method still further includes curing the molding layer and partially removing the molding layer to expose the laser emitting area. The method also includes depositing a ridge waveguide structure adjacent to the laser emitting area and depositing an upper cladding layer over the ridge waveguide structure.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150130045
    Abstract: A method of forming a semiconductor package includes providing a substrate, wherein the substrate has at least one chip attached on an upper surface of the substrate. An insulating barrier layer is deposited above the substrate, wherein the at least one chip is at least partially embedded within the insulating barrier layer. A thermally conductive layer is formed over the insulating barrier layer to at least partially encapsulate the at least one chip.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150108667
    Abstract: An approach is provided for placing and securing a chip package portion in an aligned position during a curing process. The approach involves providing an apparatus having a first reservoir configured to receive a first chip package, a second reservoir, and a third reservoir. The approach also involves placing the first chip package portion into the first reservoir, the second chip package portion into the second reservoir, and the third chip package portion into the third reservoir. The approach further involves causing the first chip package portion to be secured in a first curing position, the second chip package portion to be secured in a second curing position and the third chip package portion to be secured in a third curing position.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 23, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150104909
    Abstract: An approach is provided for aligning and leveling a chip package portion. The approach involves filling, at least partially, a reservoir formed between a first sidewall portion having a first slanted surface and a second sidewall portion having a second slanted surface with a fluid. The approach also involves placing a chip package portion into the reservoir. The approach further involves draining the fluid from the reservoir to cause the chip package portion to align with respect to a center of the reservoir. The chip package portion aligns with respect to the center of the reservoir and levels based on a relationship between the chip package portion, an angle of the first slanted surface, an angle of the second slanted surface, and the fluid. The chip package portion is secured in the aligned and leveled state by a molding compound.
    Type: Application
    Filed: October 11, 2013
    Publication date: April 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE
  • Patent number: 8976833
    Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20150061126
    Abstract: A manufacture includes a package structure, a first substrate, and a conductive member of a same material. The package structure includes a chip comprising a conductive pad, a conductive structure over the chip, and a passivation layer over the conductive structure. The passivation layer has an opening defined therein, and the opening exposes a portion of a planar portion of the conductive structure. The first substrate includes a first surface defining a first reference plane and a second surface defining a second reference plane. The conductive member extends across the first reference plane and the second reference plane and into the opening. The conductive member is electrically coupled to the exposed portion of the planar portion.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu LEE, Chun-Hao TSENG, Jui Hsieh LAI, Tien-Yu HUANG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150061137
    Abstract: A package for holding a plurality of heterogeneous integrated circuits includes a first chip having a first conductive pad and a first substrate including a first semiconductor, and a second chip having a second conductive pad and a second substrate including a second semiconductor. The second semiconductor is different from the first semiconductor. The package also includes a molding structure in which the first chip and the second chip are embedded, a conductive structure over the first chip and conductively coupled to the first conductive pad and over the second chip and conductively coupled to the second conductive pad, and a passivation layer over the conductive structure. The passivation layer comprises an opening defined therein which exposes a portion of the second chip.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu LEE, Chun-Hao TSENG, Jui Hsieh LAI, Tien-Yu HUANG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150036991
    Abstract: A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO
  • Publication number: 20150036970
    Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150016793
    Abstract: A waveguide structure includes a bottom dielectric layer, a core layer disposed over the bottom dielectric layer, an etch stop layer disposed over the core layer, and a cladding layer or a buffer layer disposed over the etch stop layer. The waveguide structure is configured to guide a light signal through different geography, such as straight, taper, turning, grating and tight coupling sections.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Tien-I Bao