Patents by Inventor Ying-hao Kuo

Ying-hao Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9335473
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: May 10, 2016
    Assignee: Taiwan Semiconductor Manfacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20160116335
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Application
    Filed: January 4, 2016
    Publication date: April 28, 2016
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Publication number: 20160056086
    Abstract: A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
    Type: Application
    Filed: November 4, 2015
    Publication date: February 25, 2016
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 9264569
    Abstract: An optical scanner includes a substrate, and a tunable laser on the substrate, wherein the tunable laser is configured to emit light, and to sweep a wavelength of the emitted light through a waveband. The optical scanner further includes a grating over a top surface of the substrate, the grating configured to diffract light emitted from the tunable laser, and an angled reflective surface configured to reflect the diffracted light from the grating. The optical scanner further includes a refractive element configured to receive the reflected light from the angled reflective surface. The refractive element is configured to focus the reflected light in a first direction and to diverge the reflected light in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20160026013
    Abstract: An electro-optic modulator device includes a modulation region, a reflecting region, a conductive line and an anti-reflecting region. The modulation region includes a doped region. The reflecting region is over the modulation region. The conductive line is connected to the doped region. The conductive line extends through the reflecting region. The anti-reflecting region is on an opposite surface of the modulation region from the reflecting region.
    Type: Application
    Filed: October 2, 2015
    Publication date: January 28, 2016
    Inventors: Wan-Yu LEE, Ying-Hao KUO
  • Patent number: 9244223
    Abstract: An approach is provided for forming a light coupling in a waveguide layer. The approach involves forming a waveguide layer overlaying an upper surface of a substrate. The approach also involves placing a chip package portion within the waveguide layer in a selected position. The approach further involves forming a molding compound layer overlaying the waveguide layer and the chip package portion. The approach additionally involves curing the molding compound layer to form a cured package. The approach also involves releasing the cured package from the substrate and inverting the cured package. The approach further involves forming a ridge waveguide structure in the waveguide layer by removing a portion of the lower surface of the cured package.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: January 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 9228896
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Patent number: 9202799
    Abstract: A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufactruing Company, Ltd.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20150318239
    Abstract: An apparatus includes a base portion having an upper surface and a lower surface opposite the upper surface. The apparatus also includes a first sidewall portion having a first upper portion distal the upper surface of the base portion and a first slanted sidewall between the first upper portion and the upper surface of the base portion. The apparatus further includes a second sidewall portion having a second upper portion distal the upper surface of the base portion and a second slanted sidewall between the second upper portion and the upper surface of the base portion. The first sidewall portion and the second sidewall portion define a first reservoir between the first slanted sidewall and the second slanted sidewall, the first reservoir being configured to receive a first chip package portion and to secure the first chip package portion in a first curing position.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 5, 2015
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150287705
    Abstract: An apparatus includes a package structure. The package structure includes a chip, a conductive structure over the chip, a molding structure surrounding and underneath the chip, and a first passivation layer over the conductive structure. The chip includes an optical component and a chip conductive pad. The conductive structure is electrically coupled to the chip conductive pad. The conductive structure has a planar portion substantially in parallel with an upper surface of the chip. The first passivation layer has a first opening defined therein. The first opening exposes a portion of the planar portion. The package structure is configured to receive an electrical coupling through the first opening in the first passivation layer.
    Type: Application
    Filed: June 22, 2015
    Publication date: October 8, 2015
    Inventors: Wan-Yu LEE, Chun-Hao TSENG, Jui Hsieh LAI, Tien-Yu HUANG, Ying-Hao KUO, Kuo-Chung YEE
  • Patent number: 9153940
    Abstract: An electro-optic modulator including a semiconductor region, a first reflecting region over the semiconductor region and an anti-reflecting region on an opposite surface of the semiconductor region from the first reflecting layer. The semiconductor region includes a first doped region and a second doped region.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: October 6, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo
  • Publication number: 20150234137
    Abstract: An optical bench includes a substrate having a trench therein, and a light emitting device within the trench. The optical bench further includes a light receiving device optically connected to the light emitting device. The optical bench further includes at least one active circuit electrically connected to the light emitting device. The optical bench further includes a waveguide in the trench, wherein the waveguide is optically between the light emitting device and the light receiving device. The optical bench further includes an optically transparent material between the light emitting device and the waveguide.
    Type: Application
    Filed: April 29, 2015
    Publication date: August 20, 2015
    Inventors: Ying-Hao KUO, Shang-Yun HOU, Wan-Yu LEE
  • Patent number: 9099623
    Abstract: A manufacture includes a package structure, a first substrate, and a conductive member of a same material. The package structure includes a chip comprising a conductive pad, a conductive structure over the chip, and a passivation layer over the conductive structure. The passivation layer has an opening defined therein, and the opening exposes a portion of a planar portion of the conductive structure. The first substrate includes a first surface defining a first reference plane and a second surface defining a second reference plane. The conductive member extends across the first reference plane and the second reference plane and into the opening. The conductive member is electrically coupled to the exposed portion of the planar portion.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: August 4, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu Lee, Chun-Hao Tseng, Jui Hsieh Lai, Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20150212270
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Patent number: 9093449
    Abstract: An approach is provided for placing and securing a chip package portion in an aligned position during a curing process. The approach involves providing an apparatus having a first reservoir configured to receive a first chip package, a second reservoir, and a third reservoir. The approach also involves placing the first chip package portion into the first reservoir, the second chip package portion into the second reservoir, and the third chip package portion into the third reservoir. The approach further involves causing the first chip package portion to be secured in a first curing position, the second chip package portion to be secured in a second curing position and the third chip package portion to be secured in a third curing position.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: July 28, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20150180210
    Abstract: A semiconductor arrangement and a method of forming the same are described. A semiconductor arrangement includes a first layer including a first optical transceiver and a second layer including a second optical transceiver. A first serializer/deserializer (SerDes) is connected to the first optical transceiver and a second SerDes is connected to the second optical transceiver. The SerDes converts parallel data input into serial data output including a clock signal that the first transceiver transmits to the second transceiver. The semiconductor arrangement has a lower area penalty than traditional intra-layer communication arrangements that do not use optics for alignment, and mitigates alignment issues associated with conventional techniques.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Inventors: Hung-Chang Yu, Ying-Hao Kuo, Kai-Chun Lin, Yue-Der Chih
  • Publication number: 20150168659
    Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.
    Type: Application
    Filed: February 26, 2015
    Publication date: June 18, 2015
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20150170990
    Abstract: A method of forming a semiconductor package includes growing a layer of carbon nano material on a chip. The chip has a first surface and a second surface and the layer of carbon nano material is grown on the first surface of the chip. The layer of carbon nano material is configured to provide a path through which heat generated from the chip is dissipated. A substrate is attached to the second surface of the chip. A molding compound is formed above the substrate to encapsulate the chip and the layer of carbon nano material.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150160413
    Abstract: A semiconductor device includes a substrate, a trench in the substrate, the trench having an inclined sidewall, a reflective layer over the inclined sidewall, a grating structure over the substrate, and a waveguide in the trench. The waveguide is configured to guide optical signals between the grating structure and the reflective layer.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 11, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Ying-Hao KUO, Tien-Yu HUANG
  • Publication number: 20150155260
    Abstract: A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 4, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Kuo-Chung Yee