Patents by Inventor Ying-Hsun CHEN

Ying-Hsun CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190067215
    Abstract: A method of forming a trench structure is provided. The method includes depositing a silicon carbide (SiC) layer on a top metal layer, forming a first passivation layer on the SiC layer, removing a portion of the first passivation layer to form a first opening, forming a second passivation layer on the first passivation layer, the second passivation layer including a first portion in the first opening, and forming a second opening by removing a part of the first portion of the second passivation layer. The forming the second opening exposes the top metal layer.
    Type: Application
    Filed: October 29, 2018
    Publication date: February 28, 2019
    Inventors: Fu-Chiang KUO, Shih-Chi KUO, Tsung-Hsien LEE, Ying-Hsun CHEN
  • Patent number: 10115679
    Abstract: A trench structure includes a top metal layer, a silicon carbide (SiC) layer on the top metal layer, a first passivation layer overlying the SiC layer, and a second passivation layer overlying the first passivation layer. The trench structure also includes a first sidewall and a second sidewall that, together with the top metal layer, form a trench. At least one of the first sidewall or the second sidewall includes a sidewall of the second passivation layer and a sidewall of the SiC layer.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: October 30, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu-Chiang Kuo, Shih-Chi Kuo, Tsung-Hsien Lee, Ying-Hsun Chen
  • Patent number: 9659874
    Abstract: A method of forming a deep trench in a semiconductor substrate includes: forming a first mask pattern over the semiconductor substrate, in which the first mask pattern has a first opening exposing a portion of the semiconductor substrate; forming a second mask pattern over the first mask pattern, in which the second mask pattern has a second opening substantially aligned with the first opening to expose the portion of the semiconductor substrate, and the second opening has a width greater than a width of the first opening to further expose a portion of the first mask pattern; and removing the portion of the semiconductor substrate, the portion of first mask pattern and another portion of the semiconductor substrate beneath the portion of the first mask pattern to form the deep trench.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Chiang Kuo, Ying-Hsun Chen, Shih-Chi Kuo, Tsung-Hsien Lee
  • Publication number: 20170110409
    Abstract: A method of forming a deep trench in a semiconductor substrate includes: forming a first mask pattern over the semiconductor substrate, in which the first mask pattern has a first opening exposing a portion of the semiconductor substrate; forming a second mask pattern over the first mask pattern, in which the second mask pattern has a second opening substantially aligned with the first opening to expose the portion of the semiconductor substrate, and the second opening has a width greater than a width of the first opening to further expose a portion of the first mask pattern; and removing the portion of the semiconductor substrate, the portion of first mask pattern and another portion of the semiconductor substrate beneath the portion of the first mask pattern to form the deep trench.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 20, 2017
    Inventors: Fu-Chiang KUO, Ying-Hsun CHEN, Shih-Chi KUO, Tsung-Hsien LEE