Patents by Inventor Ying Lu

Ying Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12121866
    Abstract: In a method for preparing a zeolite CHA membrane, a gel conversion method is adopted to assist crystallization, seed solutions with different concentrations and sizes are successively coated on the surface of a porous support to obtain a seed layer, a synthetic gel is coated on the seed layer to obtain a gel layer, and then the porous support is subjected to a membrane crystallization reaction to obtain a zeolite CHA membrane. The method skips the conventional stage of converting the heterogeneous zeolite into the zeolite CHA seed, and directly takes a heterogeneous zeolite with the same secondary structural unit as that of zeolite CHA as a seed to directly prepare a zeolite CHA membrane on a support.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: October 22, 2024
    Assignee: DALIAN UNIVERSITY OF TECHNOLOGY
    Inventors: Jianhua Yang, Linzhe Li, Ying Lu, Gaohong He, Jinming Lu, Yan Zhang
  • Patent number: 12109827
    Abstract: A described example includes a ribbon cartridge having a first spool housing to receive a first spool. The ribbon cartridge further having a second spool housing to receive a second spool. The ribbon cartridge further having at least one frame member extending between the first spool housing and the second spool housing and a spool lock, wherein the spool lock is configured to engage at least one of the first spool or the second spool in response to the ribbon cartridge not being received within a ribbon positioning assembly.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: October 8, 2024
    Assignee: Zebra Technologies Corporation
    Inventors: Petrica Dorinel Balcan, Randal Wong Mun Hon, Kuan-Ying Lu
  • Publication number: 20240321686
    Abstract: A semiconductor chip including a semiconductor substrate and an interconnect structure is provided. The semiconductor substrate includes semiconductor devices. The interconnect structure is disposed on the semiconductor substrate and electrically connected to the semiconductor devices. The semiconductor substrate or the interconnect structure includes at least one conductor, which includes a first conductive part and a second conductive part connected to the first conductive part. The first conductive part includes randomly oriented metal, and the second conductive part includes oriented metal. A bonding structure including the above-mentioned semiconductor chip and a fabricating method for fabricating the above-mentioned semiconductor chip are also provided.
    Type: Application
    Filed: March 20, 2023
    Publication date: September 26, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Cheng-Hsien Lu, Wei-Lun Weng, Ming-Hsiu Lee, Dai-Ying Lee
  • Publication number: 20240314204
    Abstract: This application discloses a transaction processing method and a device that may be used in the field of network technologies. The method includes: A transmitting device determines a first order flag for a generated first transaction based on service logic of an application, and obtains order auxiliary information of the first transaction. The order flag indicates a dependency relationship (for example, forward dependency and backward blocking) between different transactions. This application does not depend on an operation type of a transaction. A transaction order between transactions may be set, and the receiving device ensures an execution order of each transaction based on an order flag, provided that a transaction relationship is fully expressed. The transaction order is flexibly defined, to meet the requirements of different scenarios and improve processing performance.
    Type: Application
    Filed: May 29, 2024
    Publication date: September 19, 2024
    Inventors: Gang Lu, Kun Tan, Ying Li, Junying Li, Chihyung WANG, Binzhang Fu
  • Publication number: 20240314713
    Abstract: Various examples pertaining to extremely-high-throughput (EHT) error recovery in synchronous multiple-frame transmission in wireless communications are described. A multi-link device (MLD) detects a failure related to either or both of a first frame exchange sequence on a first link or a second frame exchange sequence on a second link. In response to the detecting, the MLD adjusts a timing of either or both of a first subsequent transmission on the first link and a second subsequent transmission on the second link to align the first and second subsequent transmissions.
    Type: Application
    Filed: April 27, 2024
    Publication date: September 19, 2024
    Inventors: Yongho Seok, Kai Ying Lu, James Chih-Shi Yee
  • Patent number: 12094564
    Abstract: The application provides a memory device and an operation method thereof. The memory device includes: a memory array, for processing model computation having a plurality of input values and a plurality of interact coefficients; and at least one calculation unit. In receiving the input values, a first part and a second part of the memory cells generate a first part and a second part of the common source currents, respectively. The first part of the memory cells is electrically isolated from the second part of the memory cells based on a diagonal of the memory array. The at least one calculation unit calculates a first part and a second part of a local field energy of the model computation based on the first part and the second part of the common source currents.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: September 17, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yun-Yuan Wang, Cheng-Hsien Lu, Dai-Ying Lee, Ming-Hsiu Lee, Feng-Min Lee
  • Publication number: 20240304579
    Abstract: Semiconductor devices and a method for forming a semiconductor device are provided. The semiconductor device includes a substrate, a first semiconductor structure on the substrate, a second semiconductor structure on the first semiconductor structure, and a wire coupled between the substrate and the first semiconductor structure. The first semiconductor structure and the second semiconductor structure are electrically connected to the substrate through the wire. A footprint of the first semiconductor structure is greater than a footprint of the second semiconductor structure.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 12, 2024
    Inventors: Dai-Ying LEE, Cheng-Hsien LU
  • Publication number: 20240301069
    Abstract: The present disclosure relates to the field of biomedicine, in particular to an anti-PD-L1 antibody and the use thereof. The anti-PD-L1 antibody or the antigen-binding fragment thereof provided in the present disclosure binds to a PD-L1 protein with a high affinity and high specificity, can effectively block the interaction between PD-L1 expressed on a cell surface and PD-1, and has the biological function activity of stimulating the production of cytokine, and has wide application prospects.
    Type: Application
    Filed: December 22, 2021
    Publication date: September 12, 2024
    Inventors: Lisheng LU, Yongting HUO, Chan ZHANG, Ying LUO, Di LU, Yunpeng LIU, Jun FU
  • Patent number: 12089275
    Abstract: A plurality of different medium access control (MAC) addresses are assigned to a plurality of virtual access point (AP) multi-link devices (MLDs) that are implemented within a physical AP MLD such that each of the plurality of virtual AP MLDs is assigned a respective MAC address of the plurality of different MAC addresses. Wireless communications are then established with one or more stations (STAs) over a plurality of links.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: September 10, 2024
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Yongho Seok, Kai Ying Lu, Gabor Bajko, James Chih-Shi Yee
  • Patent number: 12089254
    Abstract: A first station (STA) and a second STA perform bandwidth negotiation with a bandwidth extension indication. Then the first STA and the second STA communicate wirelessly according to the bandwidth negotiation.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: September 10, 2024
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Kai Ying Lu, Yongho Seok, James Chih-Shi Yee, Chao-Chun Wang, Jianhan Liu
  • Publication number: 20240287119
    Abstract: The present disclosure provides a 3-phenoxybenzoic acid-glucuronic acid conjugate, and a preparation method and use thereof, and belongs to the technical field of pesticide detection. Compared with 3-phenoxybenzoic acid, the 3-phenoxybenzoic acid-glucuronic acid conjugate provided by the present disclosure features structural stability, high specificity, long limit of detection, and high content in urine, and can better serve as a marker that identifies whether an organism is killed due to pyrethroid pesticide poisoning. Namely, the 3-phenoxybenzoic acid-glucuronic acid conjugate can detect whether a toxicant (pyrethroid pesticides) is taken antemortem or exposed postmortem, and has an excellent application prospect in pyrethroid pesticide detection. The present disclosure provides a preparation method of a 3-phenoxybenzoic acid-glucuronic acid conjugate.
    Type: Application
    Filed: March 29, 2023
    Publication date: August 29, 2024
    Inventors: Keming YUN, Zhuoyi WANG, Ying WANG, Yuping LU, Xianlian WANG, Hongliang SU, Chao ZHANG, Zhiwen WEI, Lele WANG, Ruili WANG
  • Patent number: 12069570
    Abstract: A processing method and a processing device for saving energy of a base station are provided. The method includes: obtaining engineering parameter data and MR data of a base station; gridding the MR data to obtain grid MR data, and calculating a calculated value of longitude and latitude data of the base station according to the grid MR data; comparing the calculated value of the longitude and latitude data of the base station with longitude and latitude data of the base station in the engineering parameter data to select engineering parameter data, which is input into a load prediction model, of the base station; inputting the engineering parameter data of the base station selected into the load prediction model to train and predict the load prediction model; and issuing a corresponding power-saving turn-off strategy according to a prediction result of the load prediction model.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: August 20, 2024
    Assignee: CHINA TELECOM CORPORATION LIMITED
    Inventors: Jingjing Yuan, Zhongyuan Lu, Le Zhang, Ying Wang
  • Patent number: 12068163
    Abstract: A method for forming a semiconductor structure in provided. The method includes providing a substrate, forming a gate electrode layer on the substrate, and performing a defluorination treatment on the gate electrode layer. The method also includes, after performing the defluorination treatment, forming a barrier layer on a portion of a surface of the gate electrode layer. The barrier layer is made of a material including titanium element.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: August 20, 2024
    Assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Hua Wang, Changyong Xiao, Yihui Lin, Qin Zhang, Yi Lu, Xiang Hu, Xiaona Zhu, Ying Jiang
  • Publication number: 20240274044
    Abstract: A display system and a power-saving method thereof are provided. In a first standby mode, a control circuit of a display device detects whether a preset pin of a signal input port generates a voltage variation or maintains at a preset voltage value during a preset period. When the control circuit detects the voltage variation or the preset voltage value, the control circuit switches the display device to a second standby mode and generates an output signal according to an input signal received by the signal input port, and allows the output signal to be transmitted to the signal output port, or establishes a network connection according to the input signal. When the control circuit does not detect the voltage variation nor the preset voltage, the first standby mode is maintained by the control circuit.
    Type: Application
    Filed: February 6, 2024
    Publication date: August 15, 2024
    Applicant: Coretronic Projection (Kunshan) Corporation
    Inventors: YIFEI SUN, YING ZHANG, QING LU, YEBING ZHANG
  • Publication number: 20240262008
    Abstract: A processing method for reducing warp of a nitrogen-doped wafer includes dividing a to-be-cut nitrogen-doped crystal ingot into a plurality of to-be-processed crystal ingot segments according to nitrogen content distribution, where each to-be-processed ingot segment corresponds to a nitrogen content range. The method further includes determining a processing condition corresponding to each to-be-processed crystal ingot segment according to correspondences between nitrogen content ranges and processing conditions, where the processing condition enables the corresponding to-be-processed crystal ingot segment to be prevented from warping during wire sawing; and performing cutting processing respectively on the each to-be-processed crystal ingot segment by using the processing condition corresponding to each to-be-processed crystal ingot segment, thereby obtaining a wafer by cutting the to-be-cut nitrogen-doped crystal ingot.
    Type: Application
    Filed: September 21, 2022
    Publication date: August 8, 2024
    Inventors: Na YI, Rongkai LINGHU, Wen ZHANG, Ying LU
  • Publication number: 20240253148
    Abstract: An example method for joining metals is described herein. The method can include forming an intermediate joint between a light metal member and a metal insert, where the intermediate joint is formed using a solid state welding process. The method can also include forming a primary joint between the light metal member and a high strength steel member, where the primary joint is formed using a welding process that produces coalescence at a temperature above the melting point of the light metal member and/or the high-strength steel member.
    Type: Application
    Filed: March 6, 2024
    Publication date: August 1, 2024
    Inventors: Wei Zhang, Ying Lu, Luke Walker, Menachem Kimchi
  • Patent number: 12048684
    Abstract: The present disclosure provides an arctigenin liquid nano-preparation and a preparation method thereof, and relates to the technical field of pharmaceutical preparation. In the present disclosure, arctigenin is prepared into a liquid nano-preparation, having advantages of distribution of a droplet diameter on nanoscale, significantly increased specific surface area, rapid absorption, and high bioavailability. Meanwhile, nano-preparation entered the body can be captured by wandering leucocytes, and a medicament is delivered to inflammatory lesions through chemiotaxis, thereby conferring a targeted drug delivery feature on the arctigenin and making a therapy more targeted.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: July 30, 2024
    Assignees: Wuhan Academy of Agricultural Sciences, Hubei Wudang Animal Pharmaceutical Co., Ltd.
    Inventors: Bin He, Lijun Wu, Zheng Lu, Zhiping Ran, Guoming Chen, Zhiyong Shao, Xiabing Chen, Wei Liu, Ying Li, Wu Liu, Qi Zhou, Wenhai Yang, Dongqing Liu, Kangyu Du
  • Patent number: 12050348
    Abstract: A method of making a chip includes depositing a first polysilicon layer on a top surface and a bottom surface of a substrate. The method further includes patterning the first polysilicon layer to define a recess, wherein the first polysilicon layer is completed removed from the recess. The method further includes implanting dopants into the substrate to define an implant region. The method further includes depositing a contact etch stop layer (CESL) in the recess, wherein the CESL covers the implant region. The method further includes patterning the CESL to define a CESL block. The method further includes forming a waveguide and a grating in the substrate. The method further includes forming an interconnect structure over the waveguide, the grating and the CESL block. The method further includes etching the interconnect structure to define a cavity aligned with the grating.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chien-Chang Lee, Chia-Ping Lai
  • Publication number: 20240246959
    Abstract: Disclosed are a compound of formula (I), a preparation method therefor, and a medical application thereof. In particular, provided are the compound of formula (I) or a stereoisomer, tautomer, or pharmaceutically acceptable salt thereof. These compounds are agonists of a glucagon-like peptide-1 receptor (GLP-1R). The present invention also relates to a pharmaceutical composition containing these compounds and use of the compound in a drug for treating diseases such as diabetes.
    Type: Application
    Filed: November 26, 2021
    Publication date: July 25, 2024
    Applicant: Shenzhen Salubris Pharmaceuticals Co., Ltd.
    Inventors: Junjun WU, Yinsuo LU, Jianli WU, Ying XIAO, Wei XING
  • Publication number: 20240251235
    Abstract: Embodiments of the present invention are drawn to electronic systems capable of transmitting a group addressed frame that identifies an MLD according to an MLD MAC address. The group addressed frame can include an ARP request, for example, and can be transmitted by an AP MLD responsive to an individually addressed frame transmitted by a non-AP STA MLD associated with the AP MLD. The AP MLD can provide a proxy ARP service for associated non-AP STA MLDs.
    Type: Application
    Filed: January 23, 2024
    Publication date: July 25, 2024
    Inventors: Yongho Seok, Kai Ying Lu, James Chih-Shi Yee