Abstract: A concentric capacitor structure generally comprising concentric capacitors is disclosed. Each concentric capacitor comprises a first plurality of perimeter plates formed on a first layer of a substrate and a second plurality of perimeter plates formed on a second layer of the substrate. The first plurality of perimeter plates extend in a first direction and the second plurality of perimeter plates extend in a second direction different than the first direction. A first set of the first plurality of perimeter plates is electrically coupled to a first set of the second plurality of perimeter plates and a second set of the first plurality of perimeter plates is electrically coupled to a second set of the second plurality of perimeter plates. A plurality of capacitive cross-plates are formed in the first layer such that each cross-plate overlaps least two of the second plurality of perimeter plates.

Abstract: A varactor includes at least one semiconductor fin, a first gate, and a second gate physically disconnected from the first gate. The first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin. The source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor.

Abstract: A filter auto-calibration system comprises a multi-clock module that includes a multi-clock generator configured to generate a first variable frequency signal based on a channel setting, the multi-clock generator comprising a quadrature signal generator configured to generate an in-phase component and a quadrature component of the first variable frequency signal; and a mixer configured to generate an in-phase component and a quadrature component of a quadrature signal from a received signal other than the first variable frequency signal. The system also comprises at least one filter to be calibrated, and an auto-calibration control module coupled to the multi-clock module and the at least one filter, the auto-calibration control module configured to receive the in-phase component and quadrature component of the first variable frequency signal from the multi-clock module, and configured to control calibration of the at least one filter based on the channel setting.

Abstract: An electronic device includes an inductive element, and variable capacitors. Each variable capacitor includes: first and third capacitors, both having a first terminal electrically connected to a first terminal of the inductive element; and second and fourth capacitors, both having a first terminal electrically connected to a second terminal of the inductive element. A first switch circuit electrically connects or isolates a second terminal of the first capacitor to/from a second terminal of the second capacitor. A second switch circuit electrically connects or isolates a second terminal of the third capacitor to/from a second terminal of the fourth capacitor. A third switch circuit electrically connects or isolates the second terminal of the first capacitor to/from the second terminal of the fourth capacitor. A fourth switch circuit electrically connects or isolates the second terminal of the third capacitor to/from the second terminal of the second capacitor.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.

Abstract: A varactor includes at least one semiconductor fin, a first gate, and a second gate physically disconnected from the first gate. The first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin. The source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor.

Abstract: A concentric capacitor structure generally comprising concentric capacitors is disclosed. Each concentric capacitor comprises a first plurality of perimeter plates formed on a first layer of a substrate and a second plurality of perimeter plates formed on a second layer of the substrate. The first plurality of perimeter plates extend in a first direction and the second plurality of perimeter plates extend in a second direction different than the first direction. A first set of the first plurality of perimeter plates is electrically coupled to a first set of the second plurality of perimeter plates and a second set of the first plurality of perimeter plates is electrically coupled to a second set of the second plurality of perimeter plates. A plurality of capacitive cross-plates are formed in the first layer such that each cross-plate overlaps least two of the second plurality of perimeter plates.

Abstract: An integrated circuit comprises an inductor over a substrate and a guard ring surrounding the inductor. The guard ring comprises a plurality of first metal lines extending in a first direction and a plurality of second metal lines extending in a second direction. The second metal lines of the plurality of second metal lines are each coupled with at least one first metal line of the plurality of first metal lines. The guard ring also comprises a staggered line comprising a connected subset of at least one first metal line of the plurality of first metal lines and at least one second metal line of the plurality of second metal lines. The first metal lines of the plurality of first metal lines outside of the connected subset, the second metal lines of the plurality of second metal lines outside of the connected subset, and the staggered line surround the inductor.

Abstract: A capacitor structure comprising semiconductor substrate and a matrix of capacitor units formed over the semiconductor substrate each capacitor unit. The matrix includes an interior structure comprised of one or more vertical plates, each vertical plate of the interior structure formed from a plurality of conductive portions connected vertically to each other, an exterior structure comprised of one or more vertical plates, each vertical plate of the exterior structure formed from a plurality of conductive portions connected vertically to each other, the exterior structure substantially encompassing the interior structure, and insulative material separating the interior and exterior structures. The structure also comprises a switching mechanism included in the capacitor structure to switch between ones of the plural capacitor units.

Abstract: An electronic device includes an inductive element, and variable capacitors. Each variable capacitor includes: first and third capacitors, both having a first terminal electrically connected to a first terminal of the inductive element; and second and fourth capacitors, both having a first terminal electrically connected to a second terminal of the inductive element. A first switch circuit electrically connects or isolates a second terminal of the first capacitor to/from a second terminal of the second capacitor. A second switch circuit electrically connects or isolates a second terminal of the third capacitor to/from a second terminal of the fourth capacitor. A third switch circuit electrically connects or isolates the second terminal of the first capacitor to/from the second terminal of the fourth capacitor. A fourth switch circuit electrically connects or isolates the second terminal of the third capacitor to/from the second terminal of the second capacitor.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.

Abstract: An apparatus is disclosed that includes a first cross-coupled transistor pair, a second cross-coupled transistor pair, at least one capacitance unit, and a first, second, third, and fourth inductive elements. The first cross-coupled transistor pair and second cross-coupled transistor pair are coupled to a pair of first output nodes and a pair of second output nodes, respectively. The at least one capacitance unit is coupled to at least one of the pair of first output nodes and the pair of second output nodes. The first and second inductive elements are electrically coupled to the first output nodes, respectively. The third inductive element is electrically coupled to one of the second output nodes and DC-biased and magnetically coupled to the first inductive element. The fourth inductive element is electrically coupled to the other of the second output nodes and DC-biased and magnetically coupled to the second inductive element.

Abstract: An up-conversion mixer includes a mixer cell having at least one output node configured to generate an output. The up-conversion mixer further includes an input stage coupled to the mixer cell, the input stage configured to receive an input signal and to produce a local minimum in a third order harmonic of the output with respect to an input power. The up-conversion mixer further includes a power supply input configured to receive a power supply voltage and a ground, and a maximum number of transistor stages between the power supply input and the ground is two.

Abstract: An electronic device includes an inductive element, and variable capacitors. Each variable capacitor includes: first and third capacitors, both having a first terminal electrically connected to a first terminal of the inductive element; and second and fourth capacitors, both having a first terminal electrically connected to a second terminal of the inductive element. A first switch circuit electrically connects or isolates a second terminal of the first capacitor to/from a second terminal of the second capacitor. A second switch circuit electrically connects or isolates a second terminal of the third capacitor to/from a second terminal of the fourth capacitor. A third switch circuit electrically connects or isolates the second terminal of the first capacitor to/from the second terminal of the fourth capacitor. A fourth switch circuit electrically connects or isolates the second terminal of the third capacitor to/from the second terminal of the second capacitor.

Abstract: The present disclosure relates to a device and method to reduce voltage headroom within a voltage-controlled oscillator by utilizing trifilar coupling or transformer feedback with a capacitive coupling technique. In some embodiments of trifilar coupling, a VCO comprises cross-coupled single-ended oscillators, wherein the voltage of first gate within a first single-ended oscillator is separated from the voltage of a second drain within a second single-ended oscillator within the cross-coupled pair.

Abstract: An apparatus is disclosed that includes a first cross-coupled transistor pair, a second cross-coupled transistor pair, at least one capacitance unit, and an inductive unit. The first cross-coupled transistor pair and second cross-coupled transistor pair are coupled to a pair of first output nodes and a pair of second output nodes, respectively. The at least one capacitance unit is coupled to at least one of the pair of first output nodes and the pair of second output nodes. The inductive unit is coupled to the first cross-coupled transistor pair at the first output nodes and coupled to the second cross-coupled transistor pair at the second output nodes. The inductive unit generates mutual magnetic coupling between one of the first output nodes and one of the second output nodes and between the other of the first output nodes and the other of the second output nodes.

Abstract: An up-conversion mixer includes a mixer cell having at least one output node configured to generate an output. The up-conversion mixer further includes a first cascaded transconductance input stage coupled to the mixer cell, the first cascaded transconductance input stage configured to receive an input signal and to reduce a third order harmonic of the output. The up-conversion mixer further includes a second cascaded transconductance input stage coupled to the mixer cell, the second cascaded transconductance input stage configured to receive the input signal and to reduce a third order harmonic of the output.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.

Abstract: An electronic device comprises first, second and third inductors connected in series and formed in a metal layer over a semiconductor substrate. The first and second inductors have a mutual inductance with each other. The second and third inductors having a mutual inductance with each other. A first capacitor has a first electrode connected to a first node. The first node is conductively coupled between the first and second inductors. A second capacitor has a second electrode connected to a second node. The second node is conductively coupled between the second and third inductors.

Abstract: The present disclosure relates to a device and method to reduce voltage headroom within a voltage-controlled oscillator by utilizing trifilar coupling or transformer feedback with a capacitive coupling technique. In some embodiments of trifilar coupling, a VCO comprises cross-coupled single-ended oscillators, wherein the voltage of first gate within a first single-ended oscillator is separated from the voltage of a second drain within a second single-ended oscillator within the cross-coupled pair.