Abstract: Methods, apparatuses and systems in an integrated bonding system for optimizing bonding alignment between dies and a substrates include bonding, using a bonder of the integrated bonding system, a first die to a first substrate using preset alignment settings, transferring, using a transfer arm/robot of the integrated bonding system, the bonded die-substrate combination to an on-board inspection tool of the integrated bonding system, inspecting, at the on-board inspection tool, an alignment of the bond between the die and the substrate of the bonded die-substrate combination to determine a misalignment measure representing a misalignment of the bond between the die and the substrate of the bonded die-substrate combination, determining from the misalignment measurement, using a machine learning process, a correction measurement to be communicated to the bonder, and bonding, in the bonder, a different die to a different substrate using the determined machine-learning based correction measurement.

Abstract: The present disclosure generally pertains to a medical device and more particularly, a metered-dose inhaler (“MDI”) actuator capable of a targeted delivery of fine API particles having particle diameters of about 1.1 ?m or less to a portion of a patient's lungs where alveoli are located.

Abstract: An array substrate and a reflective display substrate are disclosed. The array substrate includes a base, and a plurality of data lines and a plurality of sub-pixels that are disposed on the base. The sub-pixel includes a reflective pixel electrode and a TFT. An orthographic projection of the pixel electrode in each sub-pixel on the base is overlapped with orthographic projections of a first electrode, a first data line and a second data line.

Abstract: An X ray device, including an array substrate, a scintillator layer, a first adhesion layer, a function film, and a second adhesion layer, is provided. The scintillator layer is disposed on the array substrate. The first adhesion layer is disposed between the scintillator layer and the array substrate. The function film is disposed on the array substrate. The second adhesion layer is disposed between the function film and the array substrate. The function film covers the scintillator layer.

Abstract: A method for constructing a general probability model of a harmonic emission level for an industrial load is provided. The method establishes, based on harmonic data monitored by a power quality monitoring system, a general probability model by combining a parametric estimation method based on a normal distribution function and a lognormal distribution function with a nonparametric estimation method represented by a kernel density estimation method, taking a degree of approximation between the general probability model and an actual probability distribution of each harmonic current as an objective function based on parameters required by the general probability model, and optimizing and solving the parameters of the proposed general probability model by using a multiplier method to determine parameters of the general probability model to finally obtain a general probability model applicable to different industrial loads.

Abstract: This disclosure is directed to inhibitory oligonucleotides, inhibitory peptides, compositions and methods for preventing or treating Coronavirus disease 2019 (COVID-19). In one aspect, the disclosure is directed to compositions that comprise inhibitory oligonucleotides against one or more SARS-CoV-2 virus genes. In another aspect, the disclosure is directed to compositions that comprise inhibitory peptides that inhibit SARS-COV-2 entry into cells. Another aspect of the disclosure is directed to gene therapy methods for treating COVID-19, and vectors for carrying out the same. Finally, the disclosure provides nutritional supplements to support human immunity and prevent or inhibit viral infections.

Abstract: Methods of bonding one or more dies to a substrate are provided herein. In some embodiments, a method of bonding one or more dies to a substrate includes: applying a material coating on the one or more dies or the substrate; placing the one or more dies on the substrate so that the one or more dies temporarily adhere to the substrate via surface tension or tackiness of the material coating; inspecting each of the one or more dies that are placed on the substrate for defects; and removing any of the one or more dies that are found to have defects.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment may determine a block error rate (BLER) target for communications associated with the user equipment; determine a resource allocation pattern for transmission of channel state information reference signals (CSI-RS) based at least in part on the BLER target; and monitor one or more resources, indicated by the resource allocation pattern, for the CSI-RS. Numerous other aspects are provided.

Abstract: A memory structure is provided in the present disclosure. The memory structure includes a substrate, a plurality of discrete memory gate structures on the substrate where each of the plurality of memory gate structures includes a floating gate layer and a control gate layer on the floating gate layer, an isolation layer formed between adjacent memory gate structures where a top surface of the isolation layer is lower than a top surface of the control gate layer and higher than a bottom surface of the control gate layer, an opening is formed on an exposed sidewall of the control gate layer, and a bottom of the opening is lower than or coplanar with the top surface of the isolation layer, and a metal silicide layer on an exposed surface of the control gate layer and the top surface of the isolation layer.

Abstract: Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.

Abstract: A battery module includes a battery unit, a circuit board, and an expansion portion. The expansion portion is disposed between a first body and a second body and/or between a first tab and a second tab of the battery unit, and the expansion portion is configured to disconnect the first tab and/or the second tab from the circuit board.

Abstract: Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.

Abstract: The control module outputs a control signal to control the first image capture module and the second image capture module to be in a working state in a time-sharing manner. A first signal interface is electrically connected to the first node. The first optimization unit is electrically connected between the first node and the first image capture module, and the second optimization unit is electrically connected between the first node and the second image capture module. The first optimization unit is configured to ensure the smoothness of a curve of a first image signal corresponding to a first image captured when the first image capture module is in the working state, and the second optimization unit is configured to ensure the smoothness of a curve of a second image signal corresponding to a second image captured when the second image capture module is in the working state.

Abstract: A local amplifying circuit, a data readout method and a memory are provided. The local amplifying circuit includes: write control transistors, configured to connect a global data line to a local data line based on a write enable signal; column selection transistors, configured to connect a bit line to the local data line based on a column selection signal; a first control NMOS transistor, having a gate connected to the local data line, one of a source and a drain being connected to the global data line and the other being connected to a corresponding read control transistor; a second control NMOS transistor, having a gate connected to a complementary local data line, one of a source and a drain being connected to a complementary global data line and the other being connected to a corresponding read control transistor.

Abstract: A local amplifier circuit includes write control transistors, configured to connect, based on write enable signal, global data line to local data line; column selection transistors, configured to connect, based on column selection signal, bit line to local data line; first control PMOS transistor having gate connected to local data line, one of source or drain connected to global data line, and the other one connected to read control transistor; and second control PMOS transistor having gate connected to complementary local data line, one of source or drain connected to complementary global data line, and the other one connected to read control transistor. Read control transistors are configured to pull up or down levels at terminals of first control PMOS transistor and second control PMOS transistor, each of which is source or drain connected to a respective one of read control transistors, to preset level based on read enable signal.

Abstract: A light-emitting device comprises a substrate comprising a sidewall, a first top surface, and a second top surface, wherein the second top surface is closer to the sidewall of the substrate than the first top surface to the sidewall of the substrate; a semiconductor stack formed on the substrate comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing street surrounding the semiconductor stack, and exposing the first top surface and the second top surface of the substrate; a protective layer covering the semiconductor stack; a reflective layer comprising a Distributed Bragg Reflector structure covering the protective layer; and a cap layer covering the reflective layer, wherein the second top surface of the substrate is not covered by the protective layer, the reflective layer, and the cap layer.

Abstract: The present disclosure provides method and apparatus for providing a response to a user in a session. At least one message associated with a first object may be received in the session, the session being between the user and an electronic conversational agent. An image representation of the first object may be obtained. Emotion information of the first object may be determined based at least on the image representation. A response may be generated based at least on the at least one message and the emotion information. The response may be provided to the user.

Abstract: Embodiments herein describe techniques for a semiconductor device including a package substrate. The package substrate includes a via pad at least partially in a core layer. A first dielectric layer having a first dielectric material is above the via pad and the core layer, where the first dielectric layer has a first through hole that is through the first dielectric layer to reach the via pad. A second dielectric layer having a second dielectric material is at least partially filling the first through hole, where the second dielectric layer has a second through hole that is through the second dielectric layer to reach the via pad. A via is further within the second through hole of the second dielectric layer, surrounded by the second dielectric material, and in contact with the via pad. Other embodiments may be described and/or claimed.

Abstract: A phase-shift unit includes: a first substrate and a second substrate provided opposite to each other; a medium layer provided between the first substrate and the second substrate; a microstrip line disposed at a side of the second substrate facing towards the first substrate; and a grounding layer provided at a side of the first substrate facing towards the second substrate and formed with a via hole; wherein a projection of the via hole onto the second substrate and a projection of the microstrip line onto the second substrate have an overlapped area therebetween; and wherein the via hole is configured to feed a phase-shifted microwave signal out of the phase-shift unit, or feed a microwave signal into the phase-shift unit such that the microwave signal is phase-shifted.

Abstract: The present invention provides compounds of Formula (I): or a stereoisomer, tautomer, or pharmaceutically acceptable salt or solvate thereof, wherein all the variables are as defined herein. These compounds are selective LPA receptor inhibitors.