Patents by Inventor Ying Xiao

Ying Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977245
    Abstract: Methods for etching a dielectric barrier layer with high selectivity to a dielectric bulk insulating layer are provided. In one embodiment, the method includes providing a substrate having a portion of a dielectric barrier layer exposed through a dielectric bulk insulating layer in a reactor, flowing a gas mixture containing H2 gas, fluorine containing gas, at least an insert gas into the reactor, and etching the exposed portion of the dielectric barrier layer selectively to the dielectric bulk insulating layer.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: July 12, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Ying Xiao, Gerardo A. Delgadino, Karsten Schneider
  • Publication number: 20110156815
    Abstract: A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Applicant: DALI SYSTEMS CO., LTD.
    Inventors: Wan Jong Kim, Kyoung Joon Cho, Shawn Patrick Stapleton, Ying Xiao
  • Patent number: 7919335
    Abstract: A method includes measuring a depth of a shallow trench isolation (STI) region below a surface of a substrate. The STI region is filled with an oxide material. The substrate has a nitride layer above the surface. A thickness of the nitride layer is measured. A first chemical vapor etch (CVE) of the oxide material is performed, to partially form a recess in the STI region. The first CVE removes an amount of the oxide material less than the thickness of the nitride layer. The nitride layer is removed by dry etching. A remaining height of the STI region is measured after removing the nitride. A second CVE of the oxide material in the STI region is performed, based on the measured depth and the remaining height, to form at least one fin having a desired fin height above the oxide in the STI region without an oxide fence.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: April 5, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying Xiao, Chyi Shyuan Chern
  • Publication number: 20110071693
    Abstract: A system tool that provides dispatchers in power grid control centers with a capability to manage changes. Included is a user interface and a plurality of scheduler engines. Each scheduler engine is configured to look ahead at different time frames to forecast system conditions and alter generation patterns within the different time frames. A comprehensive operating plan holds schedules generated by the plurality of scheduler engines. A relational database is coupled to the comprehensive operating plan. Input data is initially received from the relational database for each scheduling engine, and thereafter the relational database receives data from the scheduling engines relative to forecast system conditions.
    Type: Application
    Filed: July 2, 2010
    Publication date: March 24, 2011
    Inventors: David Sun, Kwok Cheung, Xing Wang, But-Chung Chiu, Ying Xiao
  • Publication number: 20110055287
    Abstract: A decision-support tool is provided to evaluate operational and financial performance for dispatchers in power grid control centers associated with utility systems. A scheduler engine is coupled to a comprehensive operating plan that applies after the fact analysis for performance metrics, root-cause impacts and process re-engineering. A relational database is coupled to a data archiver that captures actual system and resource conditions and then supplies the system and resource conditions to the relational database. The scheduler engine receives the actual system and resource conditions from the relational database and processes it to calculate system performance.
    Type: Application
    Filed: July 2, 2010
    Publication date: March 3, 2011
    Inventors: David Sun, Kwok Cheung, But-Chung Chiu, Xing Wang, Ying Xiao, Kee Mok, Mike Yao
  • Patent number: 7886326
    Abstract: A web cam system has a local end computer coupled to a local end web cam, and a remote end computer coupled to a remote end web cam, with the computers coupled to a network and communicating with each other via a messaging application. A facial expression of a local end user is captured at the local end web cam. A control signal that corresponds to the captured facial expression is generated at the local end computer, and then transferred via the network to the remote end computer, which generates an indication signal to an indicator at the remote end web cam. A response is output at the indicator that is indicative of the captured facial expression.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: February 8, 2011
    Assignee: KYE Systems Corp.
    Inventor: Shi-Ying Xiao
  • Publication number: 20110029147
    Abstract: A method is provided that enables dispatchers in power grid control centers to manage changes by applying multi-interval dispatch. A multi-stage resource scheduling engine and a comprehensive operating plan are used. Multiple system parameter scenarios are coordinated.
    Type: Application
    Filed: July 2, 2010
    Publication date: February 3, 2011
    Inventors: David Sun, Kwok Cheung, Xing Wang, But-Chung Chiu, Ying Xiao
  • Publication number: 20110022434
    Abstract: A method is provided for evaluating operational and financial performance for dispatchers in power grid control centers associated with utility systems. A comprehensive operating plan is provided that applies after the fact analysis for performance metrics, root-cause impacts and process re-engineering. after the fact analysis of past events and practices is performed. Actual system and resource conditions are captured. the system and resource conditions are supplied to a relational database. A scheduler engine receives the actual system and resource conditions from the relational database and processes it to calculate system performance.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 27, 2011
    Inventors: David Sun, Kwok Cheung, But-Chung Chiu, Xing Wang, Ying Xiao, Kee Mok, Mike Yao
  • Patent number: 7828987
    Abstract: In some implementations, a method is provided in a plasma reactor for etching a trench in an organic planarization layer of a resist structure comprising a photoresist mask structure over a hardmask masking the organic planarization layer. This may include introducing into the plasma reactor an etchant gas chemistry including N2, H2, and O2 and etching a masked organic planarization layer using a plasma formed from the etchant gas chemistry. This may include etching through the planarization layer to form a trench with a single etch step.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: November 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Jens Karsten Schneider, Ying Xiao, Gerardo A. Delgadino
  • Publication number: 20100267172
    Abstract: A method includes measuring a depth of a shallow trench isolation (STI) region below a surface of a substrate. The STI region is filled with an oxide material. The substrate has a nitride layer above the surface. A thickness of the nitride layer is measured. A first chemical vapor etch (CVE) of the oxide material is performed, to partially form a recess in the STI region. The first CVE removes an amount of the oxide material less than the thickness of the nitride layer. The nitride layer is removed by dry etching. A remaining height of the STI region is measured after removing the nitride. A second CVE of the oxide material in the STI region is performed, based on the measured depth and the remaining height, to form at least one fin having a desired fin height above the oxide in the STI region without an oxide fence.
    Type: Application
    Filed: April 20, 2009
    Publication date: October 21, 2010
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying XIAO, Chyi Shyuan CHERN
  • Patent number: 7734613
    Abstract: A method, computer program product and system for creating a mini information center. A user is presented with an initial set of questions to answer. Based on these answers, topics of interests are identified. These topics of interests are presented to the user. Each topic of interest may be associated with one or more articles. The user may then select the articles that are of interest to the user. Upon selection of each article, the user may be presented with a list of options including the option of storing the selected article and associated topic in a directory which will later be used to build a mini information center. Once the user has completed the selection of articles of interest, the mini information center is built using the stored selected articles and associated topics thereby enabling the user to access the desired information in the information center using less time.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jana Helton Jenkins, Beth Monica Pursley, Ying Xiao
  • Patent number: 7618202
    Abstract: The present invention relates to a support of a computer peripheral device including a first frame, a second frame pivotally coupled to the first frame at a first end, and a movable arm connected to and movable relative to the second frame. The second frame has an extension at the other end for clamping an object between the extension and the first frame. A computer peripheral device is coupled to an end of the movable arm opposite the end that is coupled to the second frame.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: November 17, 2009
    Assignee: Kye Systems Corp.
    Inventors: Shi-Ying Xiao, Yi-Jun Lai, Zhong-Wei Lin
  • Patent number: 7619280
    Abstract: The active area of a current sense die is surrounded by a transition region which extends to the terminating periphery of the die. Spaced parallel MOSgated trenches extend through and define an active area. The trench positions in the transition region are eliminated or are deactivated, as by shorting to the MOSFET source of the trench, or by removing the source regions in areas of the transition region. By inactivating MOSgate action in the transition region surrounding the source, the device is made less sensitive to current ratio variation due to varying manufacturing tolerances. The gate to source capacitance is increased by surrounding the active area with an enlarged P+ field region which is at least five times the area of the active region, thereby to make the device less sensitive to ESD failure.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: November 17, 2009
    Assignee: International Rectifier Corporation
    Inventors: Jianjun Cao, Ying Xiao, Kyle Spring, Daniel M. Kinzer
  • Publication number: 20090095871
    Abstract: The present invention relates to a support of a computer peripheral device including a first frame, a second frame pivotally coupled to the first frame at a first end, and a movable arm connected to and movable relative to the second frame. The second frame has an extension at the other end for clamping an object between the extension and the first frame. A computer peripheral device is coupled to an end of the movable arm opposite the end that is coupled to the second frame.
    Type: Application
    Filed: November 9, 2007
    Publication date: April 16, 2009
    Applicant: KYE SYSTEMS CORP.
    Inventors: Shi-Ying Xiao, Yi-Jun Lai, Zhong-Wei Lin
  • Patent number: 7436127
    Abstract: A ballast control circuit having a bridge driver for driving a transistor bridge of a ballast circuit coupled to a resonant ballast output stage including a lamp, the ballast control circuit comprising a circuit for setting a minimum oscillation frequency and a voltage controlled oscillation circuit having a first input, wherein as a voltage at the first input increases, modes of the circuit change from a preheat mode where the frequency of oscillation moves from a first frequency to a lower preheat frequency and continues at a substantially constant preheat frequency for a set duration of preheat time, to an ignition mode where the frequency moves lower towards a resonance frequency of the ballast output stage until the lamp ignites, and to a run mode where the frequency stops decreasing and stays at the minimum set frequency.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: October 14, 2008
    Assignee: International Rectifier Corporation
    Inventors: Thomas J. Ribarich, Dana Wilhelm, Ying Xiao
  • Publication number: 20080121345
    Abstract: A method and apparatus for confining a plasma are provided herein. In one embodiment, an apparatus for confining a plasma includes a substrate support and a magnetic field forming device for forming a magnetic field proximate a boundary between a first region disposed at least above the substrate support, where a plasma is to be formed, and a second region, where the plasma is to be selectively restricted. The magnetic field has b-field components perpendicular to a direction of desired plasma confinement that selectively restrict movement of charged species of the plasma from the first region to the second region dependent upon the process conditions used to form the plasma.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 29, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Steven C. Shannon, Masao Drexel, James A. Stinnett, Ying Rui, Ying Xiao, Roger A. Lindley, Imad Yousif
  • Publication number: 20080060033
    Abstract: A web cam system has a local end computer coupled to a local end web cam, and a remote end computer coupled to a remote end web cam, with the computers coupled to a network and communicating with each other via a messaging application. A facial expression of a local end user is captured at the local end web cam. A control signal that corresponds to the captured facial expression is generated at the local end computer, and then transferred via the network to the remote end computer, which generates an indication signal to an indicator at the remote end web cam. A response is output at the indicator that is indicative of the captured facial expression.
    Type: Application
    Filed: August 23, 2006
    Publication date: March 6, 2008
    Inventor: Shi-Ying Xiao
  • Publication number: 20070224827
    Abstract: Methods for two step etching a BARC layer in a dual damascene structure are provided. In one embodiment, the method includes providing a substrate having vias filled with a BARC layer disposed on the substrate in an etch reactor, supplying a first gas mixture into the reactor to etch a first portion of the BARC layer filling in the vias, and supplying a second gas mixture comprising NH3 gas into the reactor to etch a second portion of the BARC layer disposed in the vias.
    Type: Application
    Filed: March 22, 2006
    Publication date: September 27, 2007
    Inventors: Ying Xiao, Gerardo Delgadino, Karsten Schneider
  • Publication number: 20070224807
    Abstract: Methods for etching a dielectric barrier layer with high selectivity to a dielectric bulk insulating layer are provided. In one embodiment, the method includes providing a substrate having a portion of a dielectric barrier layer exposed through a dielectric bulk insulating layer in a reactor, flowing a gas mixture containing H2 gas, fluorine containing gas, at least an insert gas into the reactor, and etching the exposed portion of the dielectric barrier layer selectively to the dielectric bulk insulating layer.
    Type: Application
    Filed: March 22, 2006
    Publication date: September 27, 2007
    Inventors: Ying Xiao, Gerardo Delgadino, Karsten Schneider
  • Publication number: 20070224803
    Abstract: Methods for etching a dielectric barrier layer with high selectivity to a dielectric bulk insulating layer are provided. In one embodiment, the method includes providing a substrate having a portion of a dielectric barrier layer exposed through a dielectric bulk insulating layer in a reactor, flowing a gas mixture containing H2 gas, fluorine containing gas, at least an insert gas into the reactor, and etching the exposed portion of the dielectric barrier layer selectively to the dielectric bulk insulating layer.
    Type: Application
    Filed: November 30, 2006
    Publication date: September 27, 2007
    Inventors: Ying Xiao, Gerardo A. Delgadino, Karsten Schnelder