Patents by Inventor Ying Yu

Ying Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220075682
    Abstract: In an embodiment, a system includes a plurality of memory components and a processing device that is operatively coupled with the plurality of memory components. The processing device includes a host interface, an access management component, a media management component (MMC), and an MMC-restart manager that is configured to perform operations including detecting a triggering event for restarting the MMC, and responsively performing MMC-restart operations that include suspending operation of the access management component; determining whether the MMC is operating, and if so then suspending operation of the MMC; resetting the MMC; resuming operation of the MMC; and resuming operation of the access management component.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Inventors: Jiangli Zhu, Ying Yu Tai, Fangfang Zhu, Wei Wang
  • Publication number: 20220069012
    Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.
    Type: Application
    Filed: April 27, 2021
    Publication date: March 3, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Xinyu BAO, Hengyuan Lee, Ying-Yu Chen
  • Patent number: 11255047
    Abstract: Disclosed in one aspect is a pickled vegetable-based edible packaging paper, the raw material of which is composed of the following components in parts by weight: 92-95 parts of a high dietary fiber-level pickled vegetable, a compounding thickener (0.6-0.8 parts of pectin, 0.6-0.8 parts of potato starch, and 0.2-0.4 parts of soy protein), and a compounding plasticizer (3-4 parts of sorbitol, and 0.5-1.5 parts of citral); and further disclosed in another aspect is a method for preparing a pickled vegetable-based edible packaging paper. The pickled vegetable paper of the present invention is a novel pickled vegetable-based product having both edible and practical functions, which product is rich in dietary fibers, retains the unique flavor and color of the pickled vegetable, has toughness and non-stickiness to teeth, and is soft and easy to process after being wetted.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: February 22, 2022
    Assignee: SHANGHAI JIAO TONG UNIVERSITY
    Inventors: Jinhong Wu, Quan Jin, Zhengwu Wang, Qiaoyu Wu, Wei Zhang, Danlu Yang, Ying Yu, Wenhui Li, Xinzhe Gu, Shaoyun Wang, Huiyun Chen
  • Publication number: 20220051737
    Abstract: One or more write operations are performed on a memory component. First data stored at the memory component is read. A determination is made as to whether an error rate associated with the first data stored at the memory component exceeds an error rate threshold. If the error rate exceeds the error rate threshold, a threshold value is adjusted. A determination is made as to whether a number of the plurality of write operations performed on the memory component since performance of a refresh operation on the memory component exceeds the threshold value. In response to determining that the number of write operations performed on the memory component exceeds the threshold value, a memory cell of the memory component is identified based on the plurality of write operations. Second data stored at memory cells of the memory component that are proximate to the identified memory cell is refreshed.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Inventors: Fangfang Zhu, Jiangli Zhu, Ying Yu Tai
  • Patent number: 11243831
    Abstract: In an embodiment, a system includes a plurality of memory components and a processing device that is operatively coupled with the plurality of memory components. The processing device includes a host interface, an access management component, a media management component (MMC), and an MMC-restart manager that is configured to perform operations including detecting a triggering event for restarting the MMC, and responsively performing MMC-restart operations that include suspending operation of the access management component; determining whether the MMC is operating, and if so then suspending operation of the MMC; resetting the MMC; resuming operation of the MMC; and resuming operation of the access management component.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: February 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jiangli Zhu, Ying Yu Tai, Fangfang Zhu, Wei Wang
  • Publication number: 20220035061
    Abstract: The invention provides a three-dimensional resistivity probe for in-situ monitoring comprises: a probe rod body inside which one or more subordinate controllers are provided; a control cabin inside which a main controller is provided disposed at the top of the probe rod body; and a cone tip provided at the bottom of the probe rod body; wherein the probe rod body comprising: a plurality of resistivity sensor modules, wherein each resistivity sensor module including a plurality of insulating rings, each insulating ring having a protruded part at a top end and a groove fitting into at a bottom end, three or more point-electrode grooves are formed at the top end of each insulating ring and two through holes allowing two positioning rods to insert into for assembly are opened thereon and the outer end of each point-electrode groove extends to an outer circumference of each insulating ring.
    Type: Application
    Filed: October 19, 2021
    Publication date: February 3, 2022
    Inventors: Tengfei Fu, Lei Guo, Xingyong Xu, Yanguang Dou, Wenquan Liu, Ying Yu
  • Publication number: 20220035572
    Abstract: A processing device, operatively coupled with a memory device, performs operations including receiving a write request from a host system at a first time, the write request identifying first data to be stored in a segment of the memory device, determining whether a pre-read voltage level of the write request satisfies a pre-read voltage level criterion pertaining to a write-to-write time interval for the segment, wherein the write-to-write time interval is defined by the first time and a second time corresponding to a last time at which the segment was written, and responsive to determining that the pre-read voltage level satisfies the pre-read voltage level criterion pertaining to the write-to-write time interval, performing a pre-read operation on the segment using the pre-read voltage level to determine second data currently stored in the segment.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 3, 2022
    Inventors: Ying Yu Tai, Jiangli Zhu
  • Publication number: 20220019383
    Abstract: Devices, methods, and media are described for unmap support in coarse mapped storage. In one embodiment a controller of a memory sub-system manages a set of metadata for super management units (SMU) of the memory sub-system, wherein each SMU of the memory sub-system comprises a plurality of data management units (MU), and wherein each MU comprises a plurality of addressable memory elements as part of a coarse memory storage of the memory sub-system. The controller processes a trim command for a first SMU of the plurality of SMUs, and adjusts a trim bit associated with metadata for the first SMU. This trim bit can then be used to manage read and write operations as the trimmed unit waits to be written with an unmap data pattern. Similarly, a trim bit in MU metadata can be used manage related operations to prevent memory access errors.
    Type: Application
    Filed: October 1, 2021
    Publication date: January 20, 2022
    Inventors: Fangfang Zhu, Ying Yu Tai, Ning Chen, Jiangli Zhu, Alex Tang
  • Patent number: 11216218
    Abstract: Devices, methods, and media are described for unmap support in coarse mapped storage. In one embodiment a controller of a memory sub-system manages a set of metadata for super management units (SMU) of the memory sub-system, wherein each SMU of the memory sub-system comprises a plurality of data management units (MU), and wherein each MU comprises a plurality of addressable memory elements as part of a coarse memory storage of the memory sub-system. The controller processes a trim command for a first SMU of the plurality of SMUs, and adjusts a trim bit associated with metadata for the first SMU. This trim bit can then be used to manage read and write operations as the trimmed unit waits to be written with an unmap data pattern. Similarly, a trim bit in MU metadata can be used manage related operations to prevent memory access errors.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: January 4, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Fangfang Zhu, Ying Yu Tai, Ning Chen, Jiangli Zhu, Alex Tang
  • Publication number: 20210395917
    Abstract: The present disclosure provides semi-insulating single-crystal silicon carbide bulk material and powder which include one polytype single crystal. The semi-insulating single-crystal silicon carbide bulk material has silicon vacancy inside, wherein the silicon-vacancy concentration is greater than 5E11 cm{circumflex over (?)}?3.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 23, 2021
    Applicant: TAISIC MATERIALS CORP.
    Inventors: Dai-Liang MA, Bang-Ying YU, Bo-Cheng LIN
  • Publication number: 20210395919
    Abstract: The present disclosure provides a manufacturing method of semi-insulating single-crystal silicon carbide powder comprising: providing a semi-insulating single-crystal silicon carbide bulk, wherein the semi-insulating single-crystal silicon carbide bulk has a first silicon-vacancy concentration, and the first silicon-vacancy concentration is greater than 5E11 cm{circumflex over (?)}?3; refining the semi-insulating single-crystal silicon carbide bulk to obtain a semi-insulating single-crystal silicon carbide coarse particle, wherein the semi-insulating single-crystal silicon carbide coarse particle has a second silicon-vacancy concentration and a first particle diameter, the second silicon-vacancy concentration is greater than 5E11 cm{circumflex over (?)}?3, and the first particle diameter is between 50 ?m and 350 ?m; self-impacting the semi-insulating single-crystal silicon carbide coarse particle to obtain a semi-insulating single-crystal silicon carbide powder, wherein the semi-insulating single-crystal sili
    Type: Application
    Filed: June 3, 2021
    Publication date: December 23, 2021
    Applicant: TAISIC MATERIALS CORP.
    Inventors: Dai-Liang MA, Bang-Ying YU, Bo-Cheng LIN
  • Publication number: 20210395918
    Abstract: The present disclosure provides high-purity semi-insulating single-crystal silicon carbide wafer and crystal which include one polytype single crystal. The semi-insulating single-crystal silicon carbide wafer has silicon vacancy inside, wherein the silicon-vacancy concentration is greater than 5E11 cm{circumflex over (?)}-3.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 23, 2021
    Applicant: TAISIC MATERIALS CORP.
    Inventors: Dai-Liang MA, Bang-Ying YU, Bo-Cheng LIN
  • Patent number: 11199999
    Abstract: A processing device, operatively coupled with a memory device, is configured to receive a write request identifying data to be stored in a segment of the memory device. The processing device determines a write-to-write (W2W) time interval for the segment and determines whether the W2W time interval falls within a first W2W time interval range, the first W2W time interval range corresponds to a first pre-read voltage level. Responsive to the W2W time interval for the segment falling within the first W2W interval range, the processing device performs a pre-read operation on the segment using the first pre-read voltage level. The processing device identifies a subset of the data to be stored in the segment comprising bits of data that are different than corresponding bits of the data stored in the segment. The processing device further performs a write operation to store the subset of the data in the segment.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Ying Yu Tai, Jiangli Zhu
  • Patent number: 11188701
    Abstract: A stacked chip layout includes a central processing chip, a first active circuit block over the central processing chip, and a second active circuit block overlapping the first active circuit. The first and second active circuit blocks are within a perimeter of the central processing chip in a plan view. The stacked chip layout includes a first routing region on a same plane as the first active circuit block, and a second routing region on a same plane as the second active circuit block. The first routing region is between the second active circuit block and the central processing chip. The stacked chip layout includes a heat dissipation element over the second active circuit block and the second routing region. The second routing region is configured to convey heat from the first active circuit block to the heat dissipation element.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: November 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Ying-Yu Hsu
  • Publication number: 20210365391
    Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.
    Type: Application
    Filed: August 2, 2021
    Publication date: November 25, 2021
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 11182873
    Abstract: A method, computer program product, and system for generating and embedding a watermark in digital video frame include a processor obtaining a request to generate a watermark and embed the watermark in a digital video frame captured by a first monitor. Based on obtaining the request, the processor fetches from one or more pre-defined regions of a memory resource, digital video data captured by at least two monitors, where a timestamp of the digital video data is equal to a timestamp of the digital video frame. The processor generates a watermark from the digital video data by calculating a binary result of the digital video data. The processor embeds the watermark (binary result) in the digital video frame.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Yu Mei Dai, Hui Wang, Wei Ying Yu, Mai Zeng
  • Patent number: 11183568
    Abstract: Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: November 23, 2021
    Assignee: National Tsing Hua University
    Inventors: I-Tung Chen, Ying-Yu Lai, Chun-An Chen, Xin-Quan Zhang, Yi-Hsien Lee
  • Patent number: 11164641
    Abstract: One or more write operations are performed on a memory component. A determination is made as to whether a number of the plurality of write operations performed on the memory component since performance of a refresh operation on the memory component exceeds a threshold value. In response to determining that the number of write operations performed on the memory component exceeds the threshold value, a memory cell of the memory component is identified based on the plurality of write operations. Data stored at memory cells of the memory component that are proximate to the identified memory cell is refreshed.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 2, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Fangfang Zhu, Jiangli Zhu, Ying Yu Tai
  • Patent number: 11130152
    Abstract: A method for the formation of tantalum carbides on a graphite substrate includes the steps of: (a) adding an organic tantalum compound, a chelating agent, a pre-polymer to an organic solvent to form a tantalum polymeric solution; (b) subjecting a graphite substrate with the tantalum polymeric solution to a curing process to form a polymeric tantalum film on the graphite substrate; and (c) subjecting the polymeric tantalum film on the graphite substrate in an oven to a pyrolytic reaction in the presence of a protective gas to obtain a protective tantalum carbide on the graphite substrate.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: September 28, 2021
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Cheng-Jung Ko, Jun-Bin Huang, Chih-Wei Kuo, Dai-Liang Ma, Bang-Ying Yu
  • Patent number: 11126544
    Abstract: A non-volatile memory (NVM) apparatus and a garbage collection method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller is coupled to the NVM. The controller accesses the NVM according to a logical address of a write command of a host. The controller performs the garbage collection method to release space occupied by invalid data. The garbage collection method includes: grouping a plurality of blocks of the NVM into a plurality of tiers according to hotness of data, moving valid data in one closed source block of a hotter tier among the tiers to one open target block of a cooler tier among the tiers, and erasing the closed source block of the hotter tier to release space.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: September 21, 2021
    Assignee: VIA Technologies, Inc.
    Inventors: Ying Yu Tai, Jiangli Zhu