Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.

Abstract: Provided is a display backplate including an array substrate and a plurality of pairs of connection structures on the array substrate, wherein the array substrate includes a plurality of thin-film transistors and a common electrode signal line, wherein at least one of the plurality of thin-film transistors is connected to one of a pair of connection structures and the common electrode signal line is connected to the other of the pair of connection structures; and an area of a first section of the connection structure is negatively correlated with a distance between the first section and a surface of the array substrate, and the first section is parallel to the surface of the array substrate.

Abstract: The present disclosure provides a base plate integrating passive devices and a method for manufacturing the same, which relate to the technical field of radio frequency devices. The base plate integrating passive devices of the present disclosure includes a substrate base plate and the passive devices disposed on the substrate base plate, the passive devices including at least an inductor, the inductor including a plurality of open ring portions arranged and connected in sequence in a direction away from the base plate, wherein an interlayer dielectric layer is disposed between the open ring portions disposed adjacently, and the open ring portions disposed adjacently are electrically connected through a first via hole penetrating the interlayer dielectric layer; orthographic projections of any two of the open ring portions on the substrate base plate at least partially overlap.

Abstract: The present disclosure provides a substrate integrated with a passive device and a method for manufacturing the same. The method includes: providing and processing a transparent dielectric layer to obtain the transparent dielectric layer provided with a first connection via therein, with the transparent dielectric layer including a first surface and a second surface which are disposed oppositely; and integrating a passive device, which includes at least an inductor, on the transparent dielectric layer. The integrating a passive device on the transparent dielectric layer includes: forming a first sub-structure on the first surface of the transparent dielectric layer, forming a second sub-structure on the second surface of the transparent dielectric layer, and forming a first connection electrode in the first connection via; and the first sub-structure, the first connection electrode and the second sub-structure are connected to form a coil structure of the inductor.

Abstract: The present disclosure provides a driving substrate and a manufacturing method thereof, and a micro LED bonding method. The driving substrate includes: a base substrate; a driving function layer provided on the base substrate, and including a plurality of driving thin film transistors and a plurality of common electrode lines; a pad layer including a plurality of pads provided on a side of the driving function layer away from the base substrate, each pad including a pad body and a microstructure of hard conductive material provided on a side of the pad body away from the base substrate; and a plurality of buffer structures provided on the side of the driving function layer away from the base substrate, each buffer structure surrounding a portion of a corresponding microstructure close to the base substrate, and a height of the buffer structure being lower than a height of the microstructure.

Abstract: An array substrate, a method for preparing the array substrate, and a backlight module are disclosed. Before electroplating a first metal layer on a pattern of a seed layer, the method further includes: forming a pattern of a compensation electrode wire electrically connected with a lead electrode on a side, where the lead electrode is formed, of a base substrate. The compensation electrode wire is at least on a second side of a wiring region, the pattern of the lead electrode is formed at a first side of the wiring region, and the first side and the second side are different sides. In the electroplating process, the lead electrode is connected with a negative pole of a power supply, the compensation electrode wire is electrically connected with the lead electrode, thus an area of an electroplating negative pole generating electric field lines is increased by utilizing the compensation electrode wire.

Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.

Abstract: A display backboard and a manufacturing method thereof, and a display device are provided. The display backboard includes: a driving substrate; a plurality of driving electrodes on the driving substrate; and a plurality of connection structures respectively on the plurality of driving electrodes. The connection structure includes: at least one conductive component on the driving electrode; and a restriction component on a side of the driving electrodes provided with the at least one conductive component and in at least a part of a peripheral region of the at least one conductive component. The restriction component protrudes from the driving electrode and has a first height in a direction perpendicular to the driving substrate.

Abstract: A display backboard and a manufacturing method thereof, and a display device are provided. The display backboard includes: a driving substrate; a plurality of driving electrodes on the driving substrate; and a plurality of connection structures respectively on the plurality of driving electrodes. The connection structure includes: at least one conductive component on the driving electrode; and a restriction component on a side of the driving electrodes provided with the at least one conductive component and in at least a part of a peripheral region of the at least one conductive component. The restriction component protrudes from the driving electrode and has a first height in a direction perpendicular to the driving substrate.

Abstract: A preparation method of a backplane includes: forming an insulating structure layer having a groove on a base substrate by a mask exposure process, the groove being used for accommodating a metal trace; and repeating a metal sub-layer forming step including an ashing process and a wet etching process multiple times to form the metal trace positioned in the groove.

Abstract: Provided is a display backplate including an array substrate and a plurality of pairs of connection structures on the array substrate, wherein the array substrate includes a plurality of thin-film transistors and a common electrode signal line, wherein at least one of the plurality of thin-film transistors is connected to one of a pair of connection structures and the common electrode signal line is connected to the other of the pair of connection structures; and an area of a first section of the connection structure is negatively correlated with a distance between the first section and a surface of the array substrate, and the first section is parallel to the surface of the array substrate.

Abstract: The present disclosure relates to an element pickup device, a method for manufacturing the same and a method for using the same. The element pickup device includes: a first substrate and a second substrate oppositely disposed; a spacing part located between the first substrate and the second substrate, wherein the spacing part is spaced apart from each other to define a flow channel for liquid; and an element pickup part including an opening located in the second substrate and in communication with the flow channel.

Abstract: Provided is a display backplate including an array substrate and a plurality of pairs of connection structures on the array substrate, wherein the array substrate includes a plurality of thin-film transistors and a common electrode signal line, wherein at least one of the plurality of thin-film transistors is connected to one of a pair of connection structures and the common electrode signal line is connected to the other of the pair of connection structures; and an area of a first section of the connection structure is negatively correlated with a distance between the first section and a surface of the array substrate, and the first section is parallel to the surface of the array substrate.

Abstract: The present disclosure provides a supporting substrate, including: a base substrate and a plurality of connecting electrodes provided on the base substrate, wherein a clamping electrode is provided on a side of at least one of the connecting electrodes facing away the base substrate, the clamping electrode is electrically connected with a corresponding connecting electrode and configured to be capable of clamping and fixing an electrode pin of the micro-light emitting device. The present disclosure also provides a manufacturing method for the supporting substrate, and a backplane.

Abstract: The present disclosure relates to a method of manufacturing an array substrate. The method of manufacturing an array substrate may include forming a main via hole in a substrate, filling a first conductive material in the main via hole, and forming a pixel circuit layer on a first surface of the substrate. The pixel circuit layer may include a first via hole. An orthographic projection of the first via hole on the substrate may at least partially overlap the corresponding main via hole.

Abstract: A display backboard and a manufacturing method thereof, and a display device are provided. The display backboard includes: a driving substrate; a plurality of driving electrodes on the driving substrate; and a plurality of connection structures respectively on the plurality of driving electrodes. The connection structure includes: at least one conductive component on the driving electrode; and a restriction component on a side of the driving electrodes provided with the at least one conductive component and in at least a part of a peripheral region of the at least one conductive component. The restriction component protrudes from the driving electrode and has a first height in a direction perpendicular to the driving substrate.

Abstract: The present disclosure relates to a display substrate, a display device, and a method for manufacturing a display substrate. The display substrate includes a base substrate having a first side and a second side opposite to the first side, a via provided in the base substrate, a thin film transistor provided on the first side of the base substrate, a first conductive structure provided on the first side of the base substrate, wherein a first sub-portion of the first conductive structure is located in the via, and wherein a material of the first conductive structure is the same as a material of a source/drain electrode of the thin film transistor.

Abstract: A display backplane includes a base, a plurality of driving electrodes disposed above the base, and a connection structure disposed on at least one of the plurality of driving electrodes. An orthographic projection of the connection structure on the base is within an orthographic projection of a corresponding driving electrode on the base; and the connection structure includes at least one conductive portion disposed at a first included angle with the corresponding driving electrode.

Abstract: A method for manufacturing an array substrate and an array substrate are provided. The method includes: providing a base substrate; forming a driving circuit layer at a side of the base substrate; and forming a functional device layer at a side of the driving circuit layer. Forming the driving circuit layer includes forming at least one first lead layer. Forming the first lead layer includes: forming a conductive seed layer at the side of the base substrate; forming a removable pattern-defining layer on a surface of the conductive seed layer, the removable pattern-defining layer being provided with a lead opening exposing a part of the conductive seed layer; forming, in the lead opening, a metal plating layer on the surface of the conductive seed layer; removing the removable pattern-defining layer; and removing a part of the conductive seed layer not covered by the metal plating layer.

Abstract: An array substrate and a manufacturing method thereof, a display device and a manufacturing method thereof are provided, which belong to the technical field of display. The array substrate includes: an interposer substrate, a fan-out region and a thin-film transistor disposed on one side of the interposer substrate, and a bonding connection line disposed on the other side of the interposer substrate. The bonding connection line includes a first lead and a second lead that are insulated from each other. The interposer substrate is provided with a first interposer via hole and a second interposer via hole. The first lead is electrically connected to the thin-film transistor by a conductive structure in the first interposer via hole and the fan-out region, and the second lead is electrically connected to the thin-film transistor by a conductive structure in the second interposer via hole and the fan-out region.