Patents by Inventor Yo-Sep Min

Yo-Sep Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9863039
    Abstract: The present disclosure relates to a MoS2 thin film and a method for manufacturing the same. The present disclosure provides a MoS2 thin film and a method for manufacturing the same using an atomic layer deposition method. In particular, the MoS2 thin film is manufactured by an atomic layer deposition method without using a toxic gas such as H2S as a sulfur precursor. Thus, the present disclosure is eco-friendly. Furthermore, it is possible to prevent the damage and contamination of manufacturing equipment during the manufacturing process. In addition, it is possible to manufacture the MoS2 thin film by precisely controlling the thickness of the MoS2 thin film to the level of an atomic layer.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: January 9, 2018
    Assignee: KONKUK UNIVERSITY INDUSTRIAL COOPERATION CORP.
    Inventor: Yo-Sep Min
  • Publication number: 20160168694
    Abstract: The present disclosure relates to a MoS2 thin film and a method for manufacturing the same. The present disclosure provides a MoS2 thin film and a method for manufacturing the same using an atomic layer deposition method. In particular, the MoS2 thin film is manufactured by an atomic layer deposition method without using a toxic gas such as H2S as a sulfur precursor. Thus, the present disclosure is eco-friendly. Furthermore, it is possible to prevent the damage and contamination of manufacturing equipment during the manufacturing process. In addition, it is possible to manufacture the MoS2 thin film by precisely controlling the thickness of the MoS2 thin film to the level of an atomic layer.
    Type: Application
    Filed: August 13, 2013
    Publication date: June 16, 2016
    Applicant: KONKUK UNIVERSITY INDUSTRIAL COOPERATION CORP.
    Inventor: Yo-Sep MIN
  • Publication number: 20150267959
    Abstract: Provided herein is a gas barrier film having excellent flexibility and an excellent gas barrier characteristic at the same time and a refrigerator having the same. Provided herein is a method of manufacturing a gas barrier film. The gas barrier film includes an organic-inorganic mixed layer on which a first organic-inorganic hybrid layer including a first organic part and a first inorganic part and an aluminum oxide layer are laminated. The gas barrier film also includes a second organic-inorganic hybrid layer including a second organic part and a second inorganic part. The gas barrier film further includes a substrate on which the organic-inorganic mixed layer and the second organic-inorganic hybrid layer are laminated.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 24, 2015
    Inventors: Seon-Yeong Kim, Yo-Sep Min, Seung Hoon Kal, Seung Jin Oh, Inhye Park, Jina Leem
  • Patent number: 8294348
    Abstract: Provided are a field emission electrode, a method of manufacturing the field emission electrode, and a field emission device including the field emission electrode. The field emission electrode may include a substrate, carbon nanotubes formed on the substrate, and a conductive layer formed on at least a portion of the surface of the substrate. Conductive nanoparticles may be attached to the external walls of the carbon nanotubes.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: October 23, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yo-sep Min, Eun-ju Bae, Wan-jun Park
  • Patent number: 8272914
    Abstract: Provided are a field emission electrode, a method of manufacturing the field emission electrode, and a field emission device including the field emission electrode. The field emission electrode may include a substrate, carbon nanotubes formed on the substrate, and a conductive layer formed on at least a portion of the surface of the substrate. Conductive nanoparticles may be attached to the external walls of the carbon nanotubes.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: September 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yo-sep Min, Eun-ju Bae, Wan-jun Park
  • Patent number: 8143660
    Abstract: Provided are a method for manufacturing a high k-dielectric oxide film, a capacitor having a dielectric film formed using the method, and a method for manufacturing the capacitor. A high k-dielectric oxide film is manufactured by (a) loading a semiconductor substrate in an ALD apparatus, (b) depositing a reaction material having a predetermined composition rate of a first element and a second element on the semiconductor substrate, and (c) forming a first high k-dielectric oxide film having the two elements on the semiconductor substrate by oxidizing the reaction material such that the first element and the second element are simultaneously oxidized. In this method, the size of an apparatus is reduced, productivity is enhanced, and manufacturing costs are lowered. Further, the high k-dielectric oxide film exhibits high dielectric constant and low leakage current and trap density.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Burn-seok Seo, Yo-sep Min, Young-jin Cho
  • Publication number: 20120003895
    Abstract: Provided are a field emission electrode, a method of manufacturing the field emission electrode, and a field emission device including the field emission electrode. The field emission electrode may include a substrate, carbon nanotubes formed on the substrate, and a conductive layer formed on at least a portion of the surface of the substrate. Conductive nanoparticles may be attached to the external walls of the carbon nanotubes.
    Type: Application
    Filed: September 9, 2011
    Publication date: January 5, 2012
    Inventors: Yo-sep Min, Eun-ju Bae, Wan-jun Park
  • Patent number: 7892917
    Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jin Cho, Yo-sep Min, Young-soo Park, Jung-hyun Lee, June-key Lee, Yong-kyun Lee
  • Patent number: 7799307
    Abstract: A method of growing single-walled carbon nanotubes. The method may include supplying at least one of an oxidant and an etchant into a vacuum chamber and supplying a source gas into the vacuum chamber to grow carbon nanotubes on a substrate in an oxidant or an etchant atmosphere. The carbon nanotubes may be grown in an H2O plasma atmosphere. The carbon nanotubes may be grown at a temperature less than 500° C.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ju Bae, Yo-Sep Min, Wan-Jun Park
  • Patent number: 7795159
    Abstract: Provided are a charge trap semiconductor memory device including a charge trap layer on a semiconductor substrate, and a method of manufacturing the charge trap semiconductor memory device. The method includes: (a) coating a first precursor material on a surface of a semiconductor substrate to be deposited and oxidizing the first precursor material to form a first layer formed of an insulating material; (b) coating a second precursor material formed of metallicity on the first layer; (c) supplying the first precursor material on the surface coated with the second precursor material to substitute the second precursor material with the first precursor material; and (d) oxidizing the first and second precursor materials obtained in (c) to form a second layer formed of an insulating material and a metal impurity, and (a) through (d) are performed at least one time to form a charge trap layer having a structure in which the metal impurity is isolated in the insulating material.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-soo Seol, Yo-sep Min, Sang-min Shin
  • Patent number: 7767502
    Abstract: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: August 3, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-young Kim, Wan-jun Park, Young-soo Park, June-key Lee, Yo-sep Min, Jang-yeon Kwon, Sun-ae Seo, Young-min Choi, Soo-doo Chae
  • Patent number: 7767140
    Abstract: A method for manufacturing ZnO nanowires with a small diameter and increased length and a device comprising the same. The manufacturing method includes: forming a ZnO seed layer containing a hydroxyl group on a substrate; and growing ZnO nanowires on the ZnO seed layer containing the hydroxyl group. Preferably, the ZnO seed layer is a thin ZnO seed layer containing more than 50% of the hydroxyl group.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: August 3, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yo-sep Min, Eun-ju Bae, Wan-jun Park
  • Patent number: 7713509
    Abstract: A method of forming nitrogen-doped or other Group V-doped single-walled nanotubes including: forming a catalyst metal layer on a substrate; loading a substrate having the catalyst metal layer into a reaction chamber; forming an H2O or other plasma atmosphere in a reaction chamber; and forming the nitrogen-doped or other Group V-doped carbon nanotubes on the catalyst metal layer by supplying a carbon or other Group IV precursor and a nitrogen or other Group V precursor into a reaction chamber where a chemical reaction therebetween is generated in the H2O or other plasma atmosphere.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: May 11, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ju Bae, Yo-Sep Min, Wan-Jun Park
  • Publication number: 20100109074
    Abstract: A gate structure using nanodots as a trap site, a semiconductor device having the gate structure and methods of fabricating the same are provided. The gate structure may include a tunneling layer, a plurality of nanodots on the tunneling layer, and a control insulating layer including a high-k dielectric layer on the tunneling layer and the nanodots. A semiconductor memory device may further include a semiconductor substrate, the gate structure according to example embodiments on the semiconductor substrate and a first impurity region and a second impurity region in the semiconductor substrate, wherein the gate structure is in contact with the first and second impurity regions.
    Type: Application
    Filed: December 8, 2009
    Publication date: May 6, 2010
    Inventors: Kwang-Soo Seol, Byung-Kl Kim, Eun-Kyung Lee, Yo-Sep Min, Kyung-Sang Cho, Jae-Ho Lee, Jae-Young Choi
  • Patent number: 7709377
    Abstract: A thin film including multi components and a method of forming the thin film are provided, wherein a method according to an embodiment of the present invention, a substrate is loaded into a reaction chamber. A unit material layer is formed on the substrate. The unit material layer may be formed of a mosaic atomic layer composed of two kinds of precursors containing components constituting the thin film. The inside of the reaction chamber is purged, and the MAL is chemically changed. The method of forming the thin film of the present invention requires fewer steps than a conventional method while retaining the advantages of the conventional method, thereby allowing a superior thin film yield in the present invention than previously obtainable.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Dae-sig Kim, Yo-sep Min, Young-jin Cho
  • Patent number: 7705347
    Abstract: Provided are an n-type carbon nanotube field effect transistor (CNT FET) and a method of fabricating the n-type CNT FET. The n-type CNT FET may include a substrate; electrodes formed on the substrate and separated from each other; a CNT formed on the substrate and electrically connected to the electrodes; a gate oxide layer formed on the CNT; and a gate electrode formed on the gate oxide layer, wherein the gate oxide layer contains electron donor atoms which donate electrons to the CNT such that the CNT may be n-doped by the electron donor atoms.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-ju Bae, Yo-sep Min, Wan-jun Park
  • Patent number: 7604790
    Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S?CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: October 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ju Bae, Yo-Sep Min, Wan-Jun Park
  • Publication number: 20090226360
    Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S—>CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.
    Type: Application
    Filed: March 9, 2006
    Publication date: September 10, 2009
    Inventors: Eun-Ju Bae, Yo-Sep Min, Wan-Jun Park
  • Patent number: 7501191
    Abstract: An amorphous dielectric film for use in a semiconductor device, such as a DRAM, and a method of manufacturing the amorphous dielectric film, includes bismuth (Bi), titanium (Ti), silicon (Si), and oxide (O). The amorphous dielectric film may have a dielectric constant of approximately 60 or higher. The amorphous dielectric film may be expressed by the chemical formula Bi1-x-yTixSiyOz, where 0.2<x<0.5, 0<y<0.5, and 1.5 <z<2.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: March 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yo-sep Min, Young-jin Cho
  • Patent number: 7501680
    Abstract: The memory device includes a source region and a drain region in a substrate and spaced apart from each other; a memory cell formed on a surface of the substrate, wherein the memory cell connects the source region and the drain region and includes a plurality of nanocrystals; a control gate formed on the memory cell. The memory cell includes a first tunneling oxide layer formed on the substrate; a second tunneling oxide layer formed on the first tunneling oxide layer; and a control oxide layer formed on the second tunneling oxide layer. The control oxide layer includes the nanocrystals. The second tunneling oxide layer, having an aminosilane group the increases electrostatic attraction, may be hydrophilic, enabling the formation of a monolayer of the nanocrystals.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: March 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-soo Seol, Seong-jae Choi, Jae-young Choi, Yo-sep Min, Eun-joo Jang, Dong-kee Yi