Abstract: Provided is a nonvolatile memory device which includes a tunneling insulating film formed on a semiconductor substrate, a storage node formed on the tunneling insulating film, a blocking insulating film formed on the storage node, and a control gate electrode formed on the blocking insulating film. The storage node includes at least two trapping films having different trap densities, and the blocking insulating film has a dielectric constant greater than that of the silicon oxide film.

Abstract: Provided is a method for fabricating a metal oxide thin film in which a metal oxide generated by a chemical reaction between a first reactant and a second reactant is deposited on the surface of a substrate as a thin film. The method involves introducing a first reactant containing a metal-organic compound into a reaction chamber including a substrate; and introducing a second reactant containing alcohol. Direct oxidation of a substrate or a deposition surface is suppressed by a reactant gas during the deposition process, as it uses alcohol vapor including no radical oxygen as a reactant gas for the deposition of a thin film. Also, since the thin film is deposited by the thermal decomposition, which is caused by the chemical reaction between the alcohol vapor and a precursor, the deposition rate is fast. Particularly, the deposition rate is also fast when a metal-organic complex with ?-diketone ligands is used as a precursor.

Abstract: Provided are a vertical carbon nanotube field effect transistor (CNTFET) and a method of manufacturing the same. The method includes: forming a first electrode on a substrate; forming a stack of multiple layers (“multi-layer stack”) on the first electrode, the multiple layers including first and second buried layers and a sacrificial layer interposed between the first and second buried layers; forming a vertical well into the multi-layer stack; growing a CNT within the well; forming a second electrode connected to the CNT on the multi-layer stack into which the well has been formed; forming a protective layer on the second electrode; removing the sacrificial layer and exposing the CNT between the first and second buried layers; forming a gate insulating layer on the exposed surface of the CNT; and forming a gate enclosing the CNT on the gate insulating layer.

Abstract: A catalytic resist and a method of patterning catalyst particles using the same are provided. The catalytic resist includes a resist and a metal precursor compound uniformly dispersed in the resist.

Abstract: In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor substrate including the tunneling oxide layer, the charge storing layer, and the blocking oxide layer under a gas atmosphere so that the blocking oxide layer has a negative fixed oxide charge; forming a gate electrode on the blocking oxide layer with the negative fixed oxide charge and etching the tunneling oxide layer, the charge storing layer, and the blocking oxide layer to form a gate structure; and forming a first doped region and a second doped region in the semiconductor substrate at sides of the gate structure by doping the semiconductor substrate with a dopant.

Abstract: A capacitor for use in a semiconductor device, a method of fabricating the capacitor, and an electronic device adopting the capacitor, wherein the capacitor includes upper and lower electrodes, each formed of a platinum group metal; a thin dielectric layer disposed between the upper and lower electrodes; and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13. In an embodiment, the method of fabricating includes absorbing CO on a surface of a lower electrode of a platinum group metal, placing the lower electrode under a reducing atmosphere to produce a lattice oxygen, using the lattice oxygen to form a thin dielectric layer by performing an ALD process using a precursor for the thin dielectric layer, and forming an upper electrode of a platinum group metal on the thin dielectric layer.

Abstract: An amorphous high-k thin film for a semiconductor device and a manufacturing method thereof are provided. The amorphous high-k thin film includes Bi, Ti, Al, and O. Since a BTAO based amorphous dielectric thin film is used as a dielectric material of a DRAM capacitor, a dielectric constant is more than 25, and an increase of a leakage current caused in reducing a physical thickness of the dielectric thin film can be prevented. Accordingly, it is very useful for the integration of the semiconductor device.

Abstract: A hafnium oxide precursor and a method for forming a hafnium oxide layer using the precursor are provided. The hafnium oxide precursor contains a nitrogen compound bound to HfCl4.

Abstract: A hafnium oxide precursor and a method for forming a hafnium oxide layer using the precursor are provided. The hafnium oxide precursor contains a nitrogen compound bound to HfCl4.

Abstract: A rewritable data storage using a carbonaceous material writes or erases information represented by the carbonaceous material by means of a current induced electrochemical reaction on a conductive layer, by controlling a voltage applied across the space between a cantilever tip and the conductive layer. Also, the size of the carbonaceous material representing information is controlled by the level of the applied voltage or the application duration.

Abstract: A method of manufacturing an inorganic nanotube using a carbon nanotube (CNT) as a template, includes preparing a template on which a CNT or a CNT array is formed, forming an inorganic thin film on the CNT by depositing an inorganic material on the template using atomic layer deposition (ALD), and removing the CNT to obtain an inorganic nanotube or an inorganic nanotube array, respectively.

Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.

Abstract: A thin film including multi components and a method of forming the thin film are provided, wherein a method according to an embodiment of the present invention, a substrate is loaded into a reaction chamber. A unit material layer is formed on the substrate. The unit material layer is a mosaic atomic layer composed of two kinds of precursors containing components constituting the thin film. The inside of the reaction chamber is purged, and the MAL is chemically changed. The method of forming the thin film of the present invention requires fewer steps than a conventional method while retaining the advantages of the conventional method, thereby allowing a superior thin film yield in the present invention than previously obtainable.

Abstract: A method of manufacturing an inorganic nanotube using a carbon nanotube (CNT) as a template, includes preparing a template on which a CNT or a CNT array is formed, forming an inorganic thin film on the CNT by depositing an inorganic material on the template using atomic layer deposition (ALD), and removing the CNT to obtain an inorganic nanotube or an inorganic nanotube array, respectively.

Abstract: An amorphous dielectric film for use in a semiconductor device, such as a DRAM, and a method of manufacturing the amorphous dielectric film, includes bismuth (Bi), titanium (Ti), silicon (Si), and oxide (O). The amorphous dielectric film may have a dielectric constant of approximately 60 or higher. The amorphous dielectric film may be expressed by the chemical formula Bi1-x-yTiySiyOz, where 0.2<x<0.5, 0<y<0.5, and 1.5<z<2.

Abstract: Provided are a vertical carbon nanotube field effect transistor (CNTFET) and a method of manufacturing the same. The method includes: forming a first electrode on a substrate; forming a stack of multiple layers (“multi-layer stack”) on the first electrode, the multiple layers including first and second buried layers and a sacrificial layer interposed between the first and second buried layers; forming a vertical well into the multi-layer stack; growing a CNT within the well; forming a second electrode connected to the CNT on the multi-layer stack into which the well has been formed; forming a protective layer on the second electrode; removing the sacrificial layer and exposing the CNT between the first and second buried layers; forming a gate insulating layer on the exposed surface of the CNT; and forming a gate enclosing the CNT on the gate insulating layer.

Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.

Abstract: A method for depositing a dielectric layer having a multi-layer structure on a substrate includes forming an oxidation barrier layer on a surface of a substrate; forming a plurality of dielectric layers on the oxidation barrier layer, wherein one of a plurality of additional oxidation barrier layers is disposed between each of the plurality of dielectric layers and an adjacent dielectric layer. Accordingly, a capacitor having low leakage current and high capacitance is obtained. In addition, a dielectric constant is controlled by adjusting a lattice constant so that a multi-layer structure of high dielectric constant is formed on a large substrate.

Abstract: A capacitor for use in a semiconductor device, a method of fabricating the capacitor, and an electronic device adopting the capacitor, wherein the capacitor includes upper and lower electrodes, each formed of a platinum group metal; a thin dielectric layer disposed between the upper and lower electrodes; and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13. In the capacitor of the present invention, oxidization of the lower electrode may be suppressed, and excellent characteristics of the thin dielectric layer may be maintained.

Abstract: Provided are a method for manufacturing a high k-dielectric oxide film, a capacitor having a dielectric film formed using the method, and a method for manufacturing the capacitor. A high k-dielectric oxide film is manufactured by (a) loading a semiconductor substrate in an ALD apparatus, (b) depositing a reaction material having a predetermined composition rate of a first element and a second element on the semiconductor substrate, and (c) forming a first high k-dielectric oxide film having the two elements on the semiconductor substrate by oxidizing the reaction material such that the first element and the second element are simultaneously oxidized. In this method, the size of an apparatus is reduced, productivity is enhanced, and manufacturing costs are lowered. Further, the high k-dielectric oxide film exhibits high dielectric constant and low leakage current and trap density.