Patents by Inventor Yogesh Kumar Ramadass

Yogesh Kumar Ramadass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948871
    Abstract: Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Yogesh Kumar Ramadass, Salvatore Frank Pavone, Mahmud Halim Chowdhury
  • Publication number: 20240088647
    Abstract: In one example, an apparatus comprises: a first switch and a second switch coupled between a fuse terminal and a ground terminal, the first switch having a first switch control terminal, the second switch having a second switch control terminal; and a driver circuit having a control input, a first control output, and a second control output, the control input coupled to the fuse terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Yogesh Kumar Ramadass, Ujwal Radhakrishna, Jeffrey Morroni
  • Publication number: 20240088878
    Abstract: In one example, an apparatus comprises a power stage having a first power stage input, a second power stage input, and a power stage output. The apparatus also comprises a modulator circuit having a first ramp input, a second ramp input, a modulator input, a first modulator output, and a second modulator output, the first modulator output coupled to the first power stage input, and the second modulator output coupled to the second power stage input. The apparatus also comprises a multi-level ramp generator having a first ramp output and a second ramp output, the first ramp output coupled to the first ramp input, and the second ramp output coupled the second ramp input.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Yinglai Xia, Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Junmin Jiang
  • Publication number: 20240079958
    Abstract: In one example, an apparatus comprises: a primary side bridge coupled between a power input and a first ground terminal, the primary side bridge having first switching terminals coupled to first capacitor terminals; and a secondary side bridge coupled between a power output and a second ground terminal, the secondary side bridge having second switching terminals coupled to second capacitor terminals.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
  • Patent number: 11824543
    Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: November 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yinglai Xia, Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Junmin Jiang
  • Patent number: 11824345
    Abstract: An example integrated circuit includes: a substrate and a first metal fuse layer on the substrate, the first metal fuse layer having first and second electrical contacts, the first electrical contact adapted to be coupled to an input terminal, the second electrical contact adapted to be coupled to a diode. The example integrated circuit further includes a second metal fuse layer on the substrate, the second metal fuse layer having third and fourth electrical contacts, the third electrical contact coupled to the second electrical contact and adapted to be coupled to the diode, the fourth electrical contact coupled to a shunt circuit.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yogesh Kumar Ramadass, Ujwal Radhakrishna, Jeffrey Morroni
  • Patent number: 11817779
    Abstract: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: November 14, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
  • Patent number: 11791714
    Abstract: A circuit includes a transformer configured with a primary winding and a secondary winding that are driven from a voltage supplied by a thermoelectric generator (TEG). The circuit includes a bipolar startup stage (BSS) coupled to the transformer to generate an intermediate voltage. The BSS includes a first transistor device coupled in series with the primary winding of the transformer to form an oscillator circuit with an inductance of the secondary winding when the voltage supplied by the TEG is positive. A second transistor device coupled to the secondary winding of the transformer enables the oscillator circuit to oscillate when the voltage supplied by the TEG is negative. After startup, a flyback converter stage can be enabled from the intermediate voltage to generate a boosted regulated output voltage.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: October 17, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nachiket Venkappayya Desai, Yogesh Kumar Ramadass
  • Publication number: 20230179090
    Abstract: In some examples, a circuit includes an amplifier, a resistor, and a damping network. The amplifier has an amplifier output and first and second amplifier inputs. The first amplifier input is adapted to be coupled to a first terminal, and the second amplifier input is configured to receive a reference voltage. The resistor is coupled between the amplifier output and the first amplifier input. The damping network is coupled between the amplifier output and the first terminal.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Inventors: Yongbin CHU, Yogesh Kumar RAMADASS
  • Publication number: 20230098806
    Abstract: A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Yinglai XIA, Yogesh Kumar RAMADASS
  • Patent number: 11616433
    Abstract: In a described example, a circuit includes a sensor, a controller and an amplifier. The sensor has a sensor input and a sensor output. The sensor input is adapted to be coupled to a chassis of a switch-mode power supply (SMPS). The controller has an input, a timing output and a level output. The input of the control circuit is coupled to the sensor output. The amplifier has a timing control input, a level control input and an amplifier output. The level control input is coupled to the level output of the controller. The timing control input is coupled to the timing output, and the amplifier output is coupled to the sensor input. The amplifier is configured to provide compensation pulses at the amplifier output having magnitude and timing to reduce common-mode noise on the chassis.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: March 28, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ashish Kumar, Yogesh Kumar Ramadass, Manish Bhardwaj
  • Patent number: 11606849
    Abstract: In described examples, a system (e.g., a light-emitting diode dimmer system) includes a switching device coupled to a switching controller. The switching controller generates a control signal, which includes a low frequency signal (e.g., for controlling a dimming function) and a switching signal. An active electromagnetic interference filter (AEF) is coupled to the DC source. An active shunt is coupled to a power input node of the switching device and is configured to selectively couple a shunt current to the power input node of the switching device in synchronization with the low frequency signal (e.g., which can reduce, if not also eliminate, a saturation time of the AEF and improve the performance of the AEF).
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 14, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yongbin Chu, Yogesh Kumar Ramadass, Jeffrey Anthony Morroni
  • Publication number: 20230072847
    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage from an input terminal of the power inverter. The capacitor has first and second terminals. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either: an output switch that selectively couples the output terminal to either the first terminal or the second terminal; or a set of input switches that selectively couple the first and second terminals to either the input terminal or a ground terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the output switch or the set of input switches.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 9, 2023
    Inventors: Orlando Lazaro, Yogesh Kumar Ramadass, Nan Xing
  • Patent number: 11601045
    Abstract: In some examples, a circuit includes an amplifier, a resistor, and a damping network. The amplifier has an amplifier output and first and second amplifier inputs. The first amplifier input is adapted to be coupled to a first terminal, and the second amplifier input is configured to receive a reference voltage. The resistor is coupled between the amplifier output and the first amplifier input. The damping network is coupled between the amplifier output and the first terminal.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: March 7, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yongbin Chu, Yogesh Kumar Ramadass
  • Publication number: 20230065567
    Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Yinglai Xia
  • Publication number: 20230028100
    Abstract: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).
    Type: Application
    Filed: October 3, 2022
    Publication date: January 26, 2023
    Inventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
  • Publication number: 20230001815
    Abstract: An example apparatus includes: a gate driver with a control output terminal, a power transistor with a gate terminal and a first current terminal, the gate terminal coupled to the control output terminal, and drain-derived supply circuitry with an output coupled to the first current terminal.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Orlando Lazaro, Timothy Bryan Merkin, Yogesh Kumar Ramadass
  • Patent number: 11543453
    Abstract: An integrated circuit includes a semiconductor die having conductive pads and an electronic component with a first terminal coupled to a third conductive pad and a second terminal coupled to a fourth conductive pad. A resistor has a first terminal coupled to the fourth conductive pad and a second terminal coupled to the fifth conductive pad, and a first transistor has a first terminal coupled to the first conductive pad, a second terminal coupled to the fifth conductive pad, and a control terminal. A second transistor has a first terminal coupled to the first transistor, a second terminal coupled to the third conductive pad, and a control terminal. A pulse generator has an input coupled to the second conductive pad and an output coupled to the control terminal of the second transistor.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: January 3, 2023
    Assignee: Texas Instruments Incorporated
    Inventor: Yogesh Kumar Ramadass
  • Publication number: 20220375836
    Abstract: Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 24, 2022
    Inventors: Benjamin Stassen Cook, Yogesh Kumar Ramadass, Salvatore Frank Pavone, Mahmud Halim Chowdhury
  • Patent number: 11502619
    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage provided at an input terminal of the power inverter. The capacitor has a first terminal and a second terminal. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either a set of input switches configured to selectively couple the first and second terminals to either the input terminal or to a ground terminal, or an output switch configured to selectively couple the output terminal to either the first terminal or the second terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the set of input switches and the output switch.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 15, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Orlando Lazaro, Yogesh Kumar Ramadass, Nan Xing