Patents by Inventor Yogesh Kumar Ramadass
Yogesh Kumar Ramadass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11463000Abstract: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).Type: GrantFiled: December 30, 2020Date of Patent: October 4, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
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Publication number: 20220302908Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.Type: ApplicationFiled: June 3, 2022Publication date: September 22, 2022Inventors: Yinglai Xia, Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Junmin Jiang
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Publication number: 20220263478Abstract: A system includes a charge pump having an input coupled to a first voltage and an output at a second voltage, the second voltage greater than the first voltage. The system also includes an amplifier having a first input, a second input, and a third input, the first input coupled to the output of the charge pump, the second input coupled to the first voltage, the third input coupled to an input signal, the amplifier having an amplified output signal. The system also includes a maximum power detector coupled to the amplifier, the maximum power detector operable to determine whether the amplified output signal has reached a threshold output level and to reduce a power of the amplified output signal responsive to the determination.Type: ApplicationFiled: February 15, 2021Publication date: August 18, 2022Inventors: Junmin JIANG, Yinglai XIA, Yogesh Kumar RAMADASS, Shailendra Kumar BARANWAL
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Patent number: 11368089Abstract: Described systems, methods, and circuitries use an interleaved multi-level converter to convert an input signal received at an input node into an output signal at an output node. In one example, a power conversion system includes a first multi-level switching circuit, a second multi-level switching circuit, and a control circuit. The first multi-level switching circuit and the second multi-level switching circuit are coupled to a switching node, the input node, and a reference node. The control circuit is configured to generate, based on the output signal, switching control signals as pulse width modulated signals having a duty cycle to control the output signal and provide the switching control signals to the first multi-level switching circuit and the second multi-level switching circuit.Type: GrantFiled: April 3, 2020Date of Patent: June 21, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sombuddha Chakraborty, Hakan Oner, Yogesh Kumar Ramadass
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Patent number: 11356082Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.Type: GrantFiled: December 11, 2020Date of Patent: June 7, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yinglai Xia, Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Junmin Jiang
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Publication number: 20220140826Abstract: In a described example, a circuit includes a power device having voltage inputs and a command input. A sensing circuit has a sensor input and a sensor output, in which the sensor input is coupled to the power device. A control circuit has a control input and a control output, in which the control input coupled to the sensor output. A driver circuit has a driver input and a driver output. The driver input is coupled to the control output, and the driver output is coupled to the command input of the power device.Type: ApplicationFiled: September 30, 2021Publication date: May 5, 2022Inventors: Orlando Lazaro, Timothy Merkin, John Russell Broze, Matthew Xiong, Yogesh Kumar Ramadass, Ujwal Radhakrishna
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Publication number: 20210313876Abstract: In a described example, a circuit includes a sensor, a controller and an amplifier. The sensor has a sensor input and a sensor output. The sensor input is adapted to be coupled to a chassis of a switch-mode power supply (SMPS). The controller has an input, a timing output and a level output. The input of the control circuit is coupled to the sensor output. The amplifier has a timing control input, a level control input and an amplifier output. The level control input is coupled to the level output of the controller. The timing control input is coupled to the timing output, and the amplifier output is coupled to the sensor input. The amplifier is configured to provide compensation pulses at the amplifier output having magnitude and timing to reduce common-mode noise on the chassis.Type: ApplicationFiled: April 6, 2021Publication date: October 7, 2021Inventors: ASHISH KUMAR, YOGESH KUMAR RAMADASS, MANISH BHARDWAJ
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Publication number: 20210313891Abstract: Described systems, methods, and circuitries use an interleaved multi-level converter to convert an input signal received at an input node into an output signal at an output node. In one example, a power conversion system includes a first multi-level switching circuit, a second multi-level switching circuit, and a control circuit. The first multi-level switching circuit and the second multi-level switching circuit are coupled to a switching node, the input node, and a reference node. The control circuit is configured to generate, based on the output signal, switching control signals as pulse width modulated signals having a duty cycle to control the output signal and provide the switching control signals to the first multi-level switching circuit and the second multi-level switching circuit.Type: ApplicationFiled: April 3, 2020Publication date: October 7, 2021Inventors: Sombuddha Chakraborty, Hakan Oner, Yogesh Kumar Ramadass
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Publication number: 20210313966Abstract: A system includes a conductive chassis having a first ground terminal. The conductive chassis couples to a switching circuit having a second ground terminal and having a first switching frequency. The second ground terminal is electrically isolated from the first ground terminal. An active electromagnetic interference (EMI) filter has an output and first and second inputs, and is configured to receive a first AC voltage having a second switching frequency at the first input, receive a second AC voltage having the second switching frequency at the second input referenced to the first ground terminal, sense noise having the first switching frequency on at least one of the first or second inputs, and generate an injection signal at the output based on the detected noise. The output couples to at least one of the first or second inputs.Type: ApplicationFiled: April 6, 2021Publication date: October 7, 2021Inventors: Ashish KUMAR, Yongbin CHU, Yogesh Kumar RAMADASS
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Publication number: 20210305893Abstract: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).Type: ApplicationFiled: December 30, 2020Publication date: September 30, 2021Inventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
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Publication number: 20210184663Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.Type: ApplicationFiled: December 11, 2020Publication date: June 17, 2021Inventors: Yinglai XIA, Shailendra Kumar BARANWAL, Yogesh Kumar RAMADASS, Junmin JIANG
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Patent number: 10965279Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.Type: GrantFiled: March 21, 2019Date of Patent: March 30, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yogesh Kumar Ramadass, Bhushan Talele, Shailendra Kumar Baranwal, Yinglai Xia, Junmin Jiang
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Publication number: 20210066909Abstract: An example integrated circuit includes: a substrate and a first metal fuse layer on the substrate, the first metal fuse layer having first and second electrical contacts, the first electrical contact adapted to be coupled to an input terminal, the second electrical contact adapted to be coupled to a diode. The example integrated circuit further includes a second metal fuse layer on the substrate, the second metal fuse layer having third and fourth electrical contacts, the third electrical contact coupled to the second electrical contact and adapted to be coupled to the diode, the fourth electrical contact coupled to a shunt circuit.Type: ApplicationFiled: September 3, 2020Publication date: March 4, 2021Inventors: Yogesh Kumar Ramadass, Ujwal Radhakrishna, Jeffrey Morroni
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Patent number: 10886881Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.Type: GrantFiled: March 21, 2019Date of Patent: January 5, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yinglai Xia, Shailendra Kumar Baranwal, Junmin Jiang, Yogesh Kumar Ramadass
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Publication number: 20200413575Abstract: In described examples, a system (e.g., a light-emitting diode dimmer system) includes a switching device coupled to a switching controller. The switching controller generates a control signal, which includes a low frequency signal (e.g., for controlling a dimming function) and a switching signal. An active electromagnetic interference filter (AEF) is coupled to the DC source. An active shunt is coupled to a power input node of the switching device and is configured to selectively couple a shunt current to the power input node of the switching device in synchronization with the low frequency signal (e.g., which can reduce, if not also eliminate, a saturation time of the AEF and improve the performance of the AEF).Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Inventors: Yongbin Chu, Yogesh Kumar Ramadass, Jeffrey Anthony Morroni
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Patent number: 10826403Abstract: A system includes an input voltage supply and a switching converter coupled to the input voltage supply. The switching converter includes a transformer having a primary coil and a secondary coil. The switching converter also includes a Y-rated capacitor with a top plate and a bottom plate, wherein the top plate is coupled to a first end of the secondary coil. The switching converter also includes a push-pull current source coupled to the bottom plate of the Y-rated capacitor. The switching converter also includes a controller coupled to the push-pull current source.Type: GrantFiled: September 10, 2019Date of Patent: November 3, 2020Assignee: Texas Instruments IncorporatedInventors: Yogesh Kumar Ramadass, Ashish Kumar
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Publication number: 20200313549Abstract: In some examples, a circuit includes an amplifier, a resistor, and a damping network. The amplifier has an amplifier output and first and second amplifier inputs. The first amplifier input is adapted to be coupled to a first terminal, and the second amplifier input is configured to receive a reference voltage. The resistor is coupled between the amplifier output and the first amplifier input. The damping network is coupled between the amplifier output and the first terminal.Type: ApplicationFiled: April 1, 2020Publication date: October 1, 2020Inventors: Yongbin CHU, Yogesh Kumar RAMADASS
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Publication number: 20200304111Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.Type: ApplicationFiled: March 21, 2019Publication date: September 24, 2020Inventors: Yogesh Kumar RAMADASS, Bhushan TALELE, Shailendra Kumar BARANWAL, Yinglai XIA, Junmin JIANG
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Publication number: 20200304080Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.Type: ApplicationFiled: March 21, 2019Publication date: September 24, 2020Inventors: Yinglai XIA, Shailendra Kumar BARANWAL, Junmin JIANG, Yogesh Kumar RAMADASS
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Patent number: 10784777Abstract: A capacitor-drop power supply includes a rectifier and a switched capacitor converter coupled to the rectifier. The rectifier is configured to receive an alternating current (AC) signal at an AC voltage and convert the AC signal into a rectified direct current (DC) signal at a rectified voltage. The switched capacitor converter is configured to receive the rectified DC signal and generate a converter output signal at a converter voltage that is proportional to the rectified voltage and that is less than the AC voltage.Type: GrantFiled: December 18, 2018Date of Patent: September 22, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yogesh Kumar Ramadass, Jeffrey Morroni