Patents by Inventor Yohichi Miwa

Yohichi Miwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180246702
    Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.
    Type: Application
    Filed: May 8, 2018
    Publication date: August 30, 2018
    Inventors: Yutaka Kawai, Yohichi Miwa
  • Patent number: 10061731
    Abstract: A programmable apparatus for executing a function is disclosed. The programmable apparatus includes a physical interface configured to be connected with an external apparatus. The programmable apparatus also includes a function logic circuit configured to execute the function on the programmable apparatus. The programmable apparatus further includes a plurality of peripheral logic circuits, each of which is configured to connect the function logic circuit with the physical interface using a respective protocol. The programmable apparatus also includes a selector circuit configured to select one from among the plurality of the peripheral logic circuits to activate.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: August 28, 2018
    Assignee: International Business Machines Corporation
    Inventors: Yutaka Kawai, Yohichi Miwa
  • Patent number: 10007488
    Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: Yutaka Kawai, Yohichi Miwa
  • Publication number: 20180101361
    Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.
    Type: Application
    Filed: November 15, 2017
    Publication date: April 12, 2018
    Inventors: Yutaka Kawai, Yohichi Miwa
  • Publication number: 20180101360
    Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.
    Type: Application
    Filed: October 10, 2016
    Publication date: April 12, 2018
    Inventors: Yutaka Kawai, Yohichi Miwa
  • Patent number: 9086809
    Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: July 21, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
  • Patent number: 9086810
    Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: July 21, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
  • Publication number: 20150116858
    Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.
    Type: Application
    Filed: September 22, 2014
    Publication date: April 30, 2015
    Applicant: International Business Machines Corporation
    Inventors: HIROSHI ITAGAKI, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
  • Publication number: 20150116859
    Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 30, 2015
    Applicant: International Business Machines Corporation
    Inventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
  • Patent number: 8918590
    Abstract: The present invention provides a ring bus type multicore system including one memory, a main memory controller for connecting the memory to a ring bus; and multiple cores connected in the shape of the ring bus, wherein each of the cores further includes a cache interface and a cache controller for controlling or managing the interface, and the cache controller of each of the cores connected in the shape of the ring bus executes a step of snooping data on the request through the cache interface; and when the cache of the core holds the data, a step of controlling the core to receive the request and return the data to the requester core, or, when the cache of the core does not hold the data, the main memory controller executes a step of reading the data from the memory and sending the data to the requester core.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Aya Minami, Yohichi Miwa
  • Publication number: 20130085623
    Abstract: A power supply device includes two or more power supply units connected in parallel with each other, each of which includes a rectifier for converting DC power from a DC power source or AC power from an AC power source into predetermined rated DC power. The device further includes a sensor for detecting a load current rate of each of the power supply units, and a controller. The controller controls the operation of the power supply units to reduce the total amount of power consumption per power supply unit calculated based on the rated DC power and the efficiency of each of the power supply units corresponding to the load current rate. As a result, the power consumption of the power supply device can be reduced more appropriately according to the load state and the efficiency of the power supply units.
    Type: Application
    Filed: August 6, 2012
    Publication date: April 4, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Naotoku Izumisawa, Yohichi Miwa, Manabu Saitoh
  • Patent number: 8364939
    Abstract: Disclosed is a system including: a calibration executing unit that performs a calibration on hardware during the system startup so as to allow the system to properly operate; and a correction data retaining unit that retains a piece of correction information in association with an environmental condition during the calibration, the correction information indicating a setting for the hardware calibrated by the calibration executing unit. If the correction data retaining unit retains the correction information associated with an environmental condition equivalent to the environmental condition at a time when the system is started up, the calibration executing unit performs the hardware setting on the basis of the retained correction information instead of calibrating the hardware.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: January 29, 2013
    Assignee: International Business Machines Corporation
    Inventors: Aya Minami, Yohichi Miwa
  • Publication number: 20120305659
    Abstract: A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.
    Type: Application
    Filed: August 16, 2012
    Publication date: December 6, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yohichi Miwa, Aya Minami
  • Patent number: 8285242
    Abstract: A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Yohichi Miwa, Aya Minami
  • Publication number: 20120151152
    Abstract: The present invention provides a ring bus type multicore system including one memory, a main memory controller for connecting the memory to a ring bus; and multiple cores connected in the shape of the ring bus, wherein each of the cores further includes a cache interface and a cache controller for controlling or managing the interface, and the cache controller of each of the cores connected in the shape of the ring bus executes a step of snooping data on the request through the cache interface; and when the cache of the core holds the data, a step of controlling the core to receive the request and return the data to the requester core, or, when the cache of the core does not hold the data, the main memory controller executes a step of reading the data from the memory and sending the data to the requester core.
    Type: Application
    Filed: December 5, 2011
    Publication date: June 14, 2012
    Applicant: International Business Machines Corporation
    Inventors: Aya Minami, Yohichi Miwa
  • Patent number: 8010771
    Abstract: The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nodes arranged at adjacent lattice points, and a shortcut link that connects, for at least two faces that are not an end face on the lattice space among faces formed of communication nodes of which any adjacent lattice points do not have communication nodes, a communication node constituting one face and a communication node constituting another face.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Takeshi Inagaki, Aya Minami, Yohichi Miwa
  • Patent number: 7953368
    Abstract: Included are: a circuit unit having a non-volatile memory; a circuit unit having a volatile memory; a read-write circuit for reading data from, writing data into, the non-volatile memory, and for reading data from, writing data into, the volatile memory; an antenna and an RF amplifier which are first power supply means for receiving a first radio wave, and for supplying power to the circuit unit; and an antenna and an RF amplifier which are second power supply means for receiving a second radio wave whose frequency is different from that of the first radio wave, and for supplying power to the circuit unit.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: May 31, 2011
    Assignee: International Business Machines Corporation
    Inventors: Yohichi Miwa, Aya Minami
  • Patent number: 7782621
    Abstract: A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: August 24, 2010
    Assignee: International Business Machines Corporation
    Inventors: Takuji Matsushiba, Aya Minami, Yohichi Miwa, Taichiroh Nomura, Kenji Tsuboi, Takeshi Wagatsuma, Masatake Yamamoto
  • Publication number: 20100211768
    Abstract: Disclosed is a system including: a calibration executing unit that performs a calibration on hardware during the system startup so as to allow the system to properly operate; and a correction data retaining unit that retains a piece of correction information in association with an environmental condition during the calibration, the correction information indicating a setting for the hardware calibrated by the calibration executing unit. If the correction data retaining unit retains the correction information associated with an environmental condition equivalent to the environmental condition at a time when the system is started up, the calibration executing unit performs the hardware setting on the basis of the retained correction information instead of calibrating the hardware.
    Type: Application
    Filed: February 11, 2010
    Publication date: August 19, 2010
    Applicant: International Business Machines Corporation
    Inventors: Aya Minami, Yohichi Miwa
  • Publication number: 20090116194
    Abstract: A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.
    Type: Application
    Filed: November 3, 2008
    Publication date: May 7, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takuji Matsushiba, Aya Minami, Yohichi Miwa, Taichiroh Nomura, Kenji Tsuboi, Takeshi Wagatsuma, Masatake Yamamoto