Patents by Inventor Yohichi Miwa
Yohichi Miwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180246702Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.Type: ApplicationFiled: May 8, 2018Publication date: August 30, 2018Inventors: Yutaka Kawai, Yohichi Miwa
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Patent number: 10061731Abstract: A programmable apparatus for executing a function is disclosed. The programmable apparatus includes a physical interface configured to be connected with an external apparatus. The programmable apparatus also includes a function logic circuit configured to execute the function on the programmable apparatus. The programmable apparatus further includes a plurality of peripheral logic circuits, each of which is configured to connect the function logic circuit with the physical interface using a respective protocol. The programmable apparatus also includes a selector circuit configured to select one from among the plurality of the peripheral logic circuits to activate.Type: GrantFiled: September 13, 2017Date of Patent: August 28, 2018Assignee: International Business Machines CorporationInventors: Yutaka Kawai, Yohichi Miwa
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Patent number: 10007488Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.Type: GrantFiled: November 15, 2017Date of Patent: June 26, 2018Assignee: International Business Machines CorporationInventors: Yutaka Kawai, Yohichi Miwa
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Publication number: 20180101361Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.Type: ApplicationFiled: November 15, 2017Publication date: April 12, 2018Inventors: Yutaka Kawai, Yohichi Miwa
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Publication number: 20180101360Abstract: The present invention provides a method of generating a sequence of pseudo-random numbers which are difficult to predict. The method includes: (i) generating a plurality of candidate pseudo-random numbers by a respectively corresponding plurality of (differently structured) linear feedback shift registers; (ii) generating a “selector number” from one or more additional linear feedback shift registers; and (iii) selecting a candidate number from the plurality of candidate numbers, based on the “selection number” to produce a selected pseudo-random number for output.Type: ApplicationFiled: October 10, 2016Publication date: April 12, 2018Inventors: Yutaka Kawai, Yohichi Miwa
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Patent number: 9086809Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.Type: GrantFiled: September 22, 2014Date of Patent: July 21, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
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Patent number: 9086810Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.Type: GrantFiled: October 17, 2014Date of Patent: July 21, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
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Publication number: 20150116858Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.Type: ApplicationFiled: September 22, 2014Publication date: April 30, 2015Applicant: International Business Machines CorporationInventors: HIROSHI ITAGAKI, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
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Publication number: 20150116859Abstract: Data is recorded such that the positions of data will be aligned in a traveling direction and a width direction of the storage medium. The medium travels in the traveling direction from a first to a second position as a certain wrap of a group of plural files in a first physical range between the first and the second positions. A head shifts from the certain wrap to another wrap in the width direction of the medium. The medium travels in the traveling direction from a third to a fourth position as the other wrap of a group of plural files in a second physical range between the third and the fourth positions. The plural files in groups on the certain wrap and the other wrap may be written in reverse order to each other after being once stored in a buffer.Type: ApplicationFiled: October 17, 2014Publication date: April 30, 2015Applicant: International Business Machines CorporationInventors: Hiroshi Itagaki, Takashi Katagiri, Yohichi Miwa, Yumi Mori, Yoshikuni Murakami, Izuru Narita, Yutaka Oishi, Kazuhiro Tsuruta
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Patent number: 8918590Abstract: The present invention provides a ring bus type multicore system including one memory, a main memory controller for connecting the memory to a ring bus; and multiple cores connected in the shape of the ring bus, wherein each of the cores further includes a cache interface and a cache controller for controlling or managing the interface, and the cache controller of each of the cores connected in the shape of the ring bus executes a step of snooping data on the request through the cache interface; and when the cache of the core holds the data, a step of controlling the core to receive the request and return the data to the requester core, or, when the cache of the core does not hold the data, the main memory controller executes a step of reading the data from the memory and sending the data to the requester core.Type: GrantFiled: December 5, 2011Date of Patent: December 23, 2014Assignee: International Business Machines CorporationInventors: Aya Minami, Yohichi Miwa
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Publication number: 20130085623Abstract: A power supply device includes two or more power supply units connected in parallel with each other, each of which includes a rectifier for converting DC power from a DC power source or AC power from an AC power source into predetermined rated DC power. The device further includes a sensor for detecting a load current rate of each of the power supply units, and a controller. The controller controls the operation of the power supply units to reduce the total amount of power consumption per power supply unit calculated based on the rated DC power and the efficiency of each of the power supply units corresponding to the load current rate. As a result, the power consumption of the power supply device can be reduced more appropriately according to the load state and the efficiency of the power supply units.Type: ApplicationFiled: August 6, 2012Publication date: April 4, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Naotoku Izumisawa, Yohichi Miwa, Manabu Saitoh
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Patent number: 8364939Abstract: Disclosed is a system including: a calibration executing unit that performs a calibration on hardware during the system startup so as to allow the system to properly operate; and a correction data retaining unit that retains a piece of correction information in association with an environmental condition during the calibration, the correction information indicating a setting for the hardware calibrated by the calibration executing unit. If the correction data retaining unit retains the correction information associated with an environmental condition equivalent to the environmental condition at a time when the system is started up, the calibration executing unit performs the hardware setting on the basis of the retained correction information instead of calibrating the hardware.Type: GrantFiled: February 11, 2010Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Aya Minami, Yohichi Miwa
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Publication number: 20120305659Abstract: A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.Type: ApplicationFiled: August 16, 2012Publication date: December 6, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yohichi Miwa, Aya Minami
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Patent number: 8285242Abstract: A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.Type: GrantFiled: September 15, 2005Date of Patent: October 9, 2012Assignee: International Business Machines CorporationInventors: Yohichi Miwa, Aya Minami
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Publication number: 20120151152Abstract: The present invention provides a ring bus type multicore system including one memory, a main memory controller for connecting the memory to a ring bus; and multiple cores connected in the shape of the ring bus, wherein each of the cores further includes a cache interface and a cache controller for controlling or managing the interface, and the cache controller of each of the cores connected in the shape of the ring bus executes a step of snooping data on the request through the cache interface; and when the cache of the core holds the data, a step of controlling the core to receive the request and return the data to the requester core, or, when the cache of the core does not hold the data, the main memory controller executes a step of reading the data from the memory and sending the data to the requester core.Type: ApplicationFiled: December 5, 2011Publication date: June 14, 2012Applicant: International Business Machines CorporationInventors: Aya Minami, Yohichi Miwa
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Patent number: 8010771Abstract: The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nodes arranged at adjacent lattice points, and a shortcut link that connects, for at least two faces that are not an end face on the lattice space among faces formed of communication nodes of which any adjacent lattice points do not have communication nodes, a communication node constituting one face and a communication node constituting another face.Type: GrantFiled: December 4, 2006Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Takeshi Inagaki, Aya Minami, Yohichi Miwa
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Patent number: 7953368Abstract: Included are: a circuit unit having a non-volatile memory; a circuit unit having a volatile memory; a read-write circuit for reading data from, writing data into, the non-volatile memory, and for reading data from, writing data into, the volatile memory; an antenna and an RF amplifier which are first power supply means for receiving a first radio wave, and for supplying power to the circuit unit; and an antenna and an RF amplifier which are second power supply means for receiving a second radio wave whose frequency is different from that of the first radio wave, and for supplying power to the circuit unit.Type: GrantFiled: December 14, 2005Date of Patent: May 31, 2011Assignee: International Business Machines CorporationInventors: Yohichi Miwa, Aya Minami
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Patent number: 7782621Abstract: A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.Type: GrantFiled: November 3, 2008Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Takuji Matsushiba, Aya Minami, Yohichi Miwa, Taichiroh Nomura, Kenji Tsuboi, Takeshi Wagatsuma, Masatake Yamamoto
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Publication number: 20100211768Abstract: Disclosed is a system including: a calibration executing unit that performs a calibration on hardware during the system startup so as to allow the system to properly operate; and a correction data retaining unit that retains a piece of correction information in association with an environmental condition during the calibration, the correction information indicating a setting for the hardware calibrated by the calibration executing unit. If the correction data retaining unit retains the correction information associated with an environmental condition equivalent to the environmental condition at a time when the system is started up, the calibration executing unit performs the hardware setting on the basis of the retained correction information instead of calibrating the hardware.Type: ApplicationFiled: February 11, 2010Publication date: August 19, 2010Applicant: International Business Machines CorporationInventors: Aya Minami, Yohichi Miwa
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Publication number: 20090116194Abstract: A circuit module includes: a thermally conductive board forming a part of a housing; a circuit board disposed above the thermally conductive board; a semiconductor chip connected to a plurality of electrode pads on a upper surface of the circuit board through solder; a heat sink connected to a upper surface of the semiconductor chip; a thermally conductive member thermally connecting the thermally conductive board to the semiconductor chip; and a plurality of fasteners passing through the thickness of the circuit board in an area surrounding the semiconductor chip to attach the heat sink to the thermally conductive board.Type: ApplicationFiled: November 3, 2008Publication date: May 7, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Takuji Matsushiba, Aya Minami, Yohichi Miwa, Taichiroh Nomura, Kenji Tsuboi, Takeshi Wagatsuma, Masatake Yamamoto