Abstract: This is an embodiment for enabling calibration of the bus interfacing cell processors and I/O Controllers in a multi-cell system without rebooting the system in response to a change in the environment temperature. This is accomplished by periodically checking the intake temperature. If the temperature rise is less than a predefined threshold, no action is taken. If the temperature rise is more than a predefined threshold, external interfaces are disabled, cell operations are halted and calibration is performed. Once the calibration is completed, cell operations are resumed and external interfaces are re-enabled.

Abstract: An embodiment describes a method of implementing higher level and more robust encryption by using a multi-core processor. The clear text is segmented into text segments based on predefined segment lengths by master processor. Text segments are sent to processing elements which in turn encrypted and encrypted segments are sent back to master processor which is aggregated into encrypted text. To decrypt the text, encrypted text is split into encrypted segments per predefined lengths by master processor and sent to processing elements to be decrypted. The resulted plain text segments are sent back to master processor which is aggregated into original plain text.

Abstract: The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nodes arranged at adjacent lattice points, and a shortcut link that connects, for at least two faces that are not an end face on the lattice space among faces formed of communication nodes of which any adjacent lattice points do not have communication nodes, a communication node constituting one face and a communication node constituting another face.

Abstract: A system, method, and apparatus are disclosed for storing segmented data and corresponding parity data with modules configured to functionally execute the necessary steps of storing segmented data and corresponding parity data. These modules, in the described embodiments, include a designation module that designates a first set of data, from parity data and a plurality of segmented data, as surplus data and designates the remaining data as primary data. A storage module stores the primary data in main electronic storage devices in a distributed manner and stores a first copy of the surplus data on a first main electronic storage device and a second copy of the surplus data on a second main electronic storage device. An optional auxiliary storage module selectively activates an auxiliary electronic storage device and stores the surplus data on the auxiliary storage device. Beneficially, selective activation of the auxiliary electronic storage conserves power.

Abstract: Included are: a circuit unit having a non-volatile memory; a circuit unit having a volatile memory; a read-write circuit for reading data from, writing data into, the non-volatile memory, and for reading data from, writing data into, the volatile memory; an antenna and an RF amplifier which are first power supply means for receiving a first radio wave, and for supplying power to the circuit unit; and an antenna and an RF amplifier which are second power supply means for receiving a second radio wave whose frequency is different from that of the first radio wave, and for supplying power to the circuit unit.

Abstract: A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.

Abstract: A method for switching between boot devices in an information processing unit devoid of a human machine interface for inputting, the steps of short-circuiting an output port and an input port, outputting a verification signal from the output port at the time of powering on or restarting the information processing unit, determining whether or not the verification signal is input to the input port, switching the OS boot source to a second boot device if the verification signal is input to the input port, and switching the OS boot source to a first boot device if the verification signal is not input to the input port, is provided for.

Abstract: Three striped data and their parity data are generated from write data. The three striped data are recorded in three hard disk drives, respectively. The parity data is recorded in each of two of the three hard disk drives. An auxiliary hard disk drive is activated with proper timing and the parity data is moved thereto. As a result, the power consumption of one hard disk drive that is needed conventionally for recording of parity data can be saved.

Abstract: A plurality of hard disk drives 102-105, and a timer 107 are provided in a server unit 101. An OS is stored in each of the hard disk drives 102 and 103. First, an attempt is made to load the OS stored in the hard disk drive 102 and, at the same time, counting is started by the timer 107. If the loading of the OS stored in the hard disk drive 102 has not been completed when a count value of the timer 107 has reached a predetermined value, the loading operation is stopped, and the OS stored in the hard disk drive 103 is loaded.

Abstract: A method for switching between boot devices in an information processing unit devoid of a human machine interface for inputting, the steps of short-circuiting an output port and an input port, outputting a verification signal from the output port at the time of powering on or restarting the information processing unit, determining whether or not the verification signal is input to the input port, switching the OS boot source to a second boot device if the verification signal is input to the input port, and switching the OS boot source to a first boot device if the verification signal is not input to the input port, is provided for.

Abstract: Provided is a system to reduce the force required for inserting a circuit board assembly including a plurality of circuit boards into the card edge connectors. A circuit board assembly includes a first circuit board, a second circuit board and a coupling part. The first circuit board includes printed circuit elements and a connecting part. In the same manner as the first circuit board, the second circuit board includes printed circuit elements and a connecting part. The front edge of the connecting parts are shifted from the front edge of the other connecting part by a distance “d” along the connecting or inserting direction of the circuit boards toward the card edge connectors, so that the distance between the front edge of the connecting part of the first circuit board and the first card edge connector differs from the distance between the front edge of the connecting part of the second circuit board and the second card edge connector.